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libata-core.c

/*
 *  libata-core.c - helper library for ATA
 *
 *  Maintained by:  Jeff Garzik <jgarzik@pobox.com>
 *                    Please ALWAYS copy linux-ide@vger.kernel.org
 *              on emails.
 *
 *  Copyright 2003-2004 Red Hat, Inc.  All rights reserved.
 *  Copyright 2003-2004 Jeff Garzik
 *
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2, or (at your option)
 *  any later version.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with this program; see the file COPYING.  If not, write to
 *  the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
 *
 *
 *  libata documentation is available via 'make {ps|pdf}docs',
 *  as Documentation/DocBook/libata.*
 *
 *  Hardware documentation available from http://www.t13.org/ and
 *  http://www.sata-io.org/
 *
 *  Standards documents from:
 *    http://www.t13.org (ATA standards, PCI DMA IDE spec)
 *    http://www.t10.org (SCSI MMC - for ATAPI MMC)
 *    http://www.sata-io.org (SATA)
 *    http://www.compactflash.org (CF)
 *    http://www.qic.org (QIC157 - Tape and DSC)
 *    http://www.ce-ata.org (CE-ATA: not supported)
 *
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/list.h>
#include <linux/mm.h>
#include <linux/highmem.h>
#include <linux/spinlock.h>
#include <linux/blkdev.h>
#include <linux/delay.h>
#include <linux/timer.h>
#include <linux/interrupt.h>
#include <linux/completion.h>
#include <linux/suspend.h>
#include <linux/workqueue.h>
#include <linux/jiffies.h>
#include <linux/scatterlist.h>
#include <linux/io.h>
#include <scsi/scsi.h>
#include <scsi/scsi_cmnd.h>
#include <scsi/scsi_host.h>
#include <linux/libata.h>
#include <asm/semaphore.h>
#include <asm/byteorder.h>
#include <linux/cdrom.h>

#include "libata.h"


/* debounce timing parameters in msecs { interval, duration, timeout } */
const unsigned long sata_deb_timing_normal[]          = {   5,  100, 2000 };
const unsigned long sata_deb_timing_hotplug[]         = {  25,  500, 2000 };
const unsigned long sata_deb_timing_long[]            = { 100, 2000, 5000 };

static unsigned int ata_dev_init_params(struct ata_device *dev,
                              u16 heads, u16 sectors);
static unsigned int ata_dev_set_xfermode(struct ata_device *dev);
static unsigned int ata_dev_set_feature(struct ata_device *dev,
                              u8 enable, u8 feature);
static void ata_dev_xfermask(struct ata_device *dev);
static unsigned long ata_dev_blacklisted(const struct ata_device *dev);

unsigned int ata_print_id = 1;
static struct workqueue_struct *ata_wq;

struct workqueue_struct *ata_aux_wq;

int atapi_enabled = 1;
module_param(atapi_enabled, int, 0444);
MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");

int atapi_dmadir = 0;
module_param(atapi_dmadir, int, 0444);
MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)");

int atapi_passthru16 = 1;
module_param(atapi_passthru16, int, 0444);
MODULE_PARM_DESC(atapi_passthru16, "Enable ATA_16 passthru for ATAPI devices; on by default (0=off, 1=on)");

int libata_fua = 0;
module_param_named(fua, libata_fua, int, 0444);
MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");

static int ata_ignore_hpa;
module_param_named(ignore_hpa, ata_ignore_hpa, int, 0644);
MODULE_PARM_DESC(ignore_hpa, "Ignore HPA limit (0=keep BIOS limits, 1=ignore limits, using full disk)");

static int libata_dma_mask = ATA_DMA_MASK_ATA|ATA_DMA_MASK_ATAPI|ATA_DMA_MASK_CFA;
module_param_named(dma, libata_dma_mask, int, 0444);
MODULE_PARM_DESC(dma, "DMA enable/disable (0x1==ATA, 0x2==ATAPI, 0x4==CF)");

static int ata_probe_timeout = ATA_TMOUT_INTERNAL / HZ;
module_param(ata_probe_timeout, int, 0444);
MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)");

int libata_noacpi = 0;
module_param_named(noacpi, libata_noacpi, int, 0444);
MODULE_PARM_DESC(noacpi, "Disables the use of ACPI in probe/suspend/resume when set");

MODULE_AUTHOR("Jeff Garzik");
MODULE_DESCRIPTION("Library module for ATA devices");
MODULE_LICENSE("GPL");
MODULE_VERSION(DRV_VERSION);


/**
 *    ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
 *    @tf: Taskfile to convert
 *    @pmp: Port multiplier port
 *    @is_cmd: This FIS is for command
 *    @fis: Buffer into which data will output
 *
 *    Converts a standard ATA taskfile to a Serial ATA
 *    FIS structure (Register - Host to Device).
 *
 *    LOCKING:
 *    Inherited from caller.
 */
void ata_tf_to_fis(const struct ata_taskfile *tf, u8 pmp, int is_cmd, u8 *fis)
{
      fis[0] = 0x27;                /* Register - Host to Device FIS */
      fis[1] = pmp & 0xf;           /* Port multiplier number*/
      if (is_cmd)
            fis[1] |= (1 << 7);     /* bit 7 indicates Command FIS */

      fis[2] = tf->command;
      fis[3] = tf->feature;

      fis[4] = tf->lbal;
      fis[5] = tf->lbam;
      fis[6] = tf->lbah;
      fis[7] = tf->device;

      fis[8] = tf->hob_lbal;
      fis[9] = tf->hob_lbam;
      fis[10] = tf->hob_lbah;
      fis[11] = tf->hob_feature;

      fis[12] = tf->nsect;
      fis[13] = tf->hob_nsect;
      fis[14] = 0;
      fis[15] = tf->ctl;

      fis[16] = 0;
      fis[17] = 0;
      fis[18] = 0;
      fis[19] = 0;
}

/**
 *    ata_tf_from_fis - Convert SATA FIS to ATA taskfile
 *    @fis: Buffer from which data will be input
 *    @tf: Taskfile to output
 *
 *    Converts a serial ATA FIS structure to a standard ATA taskfile.
 *
 *    LOCKING:
 *    Inherited from caller.
 */

void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
{
      tf->command = fis[2];   /* status */
      tf->feature = fis[3];   /* error */

      tf->lbal    = fis[4];
      tf->lbam    = fis[5];
      tf->lbah    = fis[6];
      tf->device  = fis[7];

      tf->hob_lbal      = fis[8];
      tf->hob_lbam      = fis[9];
      tf->hob_lbah      = fis[10];

      tf->nsect   = fis[12];
      tf->hob_nsect     = fis[13];
}

static const u8 ata_rw_cmds[] = {
      /* pio multi */
      ATA_CMD_READ_MULTI,
      ATA_CMD_WRITE_MULTI,
      ATA_CMD_READ_MULTI_EXT,
      ATA_CMD_WRITE_MULTI_EXT,
      0,
      0,
      0,
      ATA_CMD_WRITE_MULTI_FUA_EXT,
      /* pio */
      ATA_CMD_PIO_READ,
      ATA_CMD_PIO_WRITE,
      ATA_CMD_PIO_READ_EXT,
      ATA_CMD_PIO_WRITE_EXT,
      0,
      0,
      0,
      0,
      /* dma */
      ATA_CMD_READ,
      ATA_CMD_WRITE,
      ATA_CMD_READ_EXT,
      ATA_CMD_WRITE_EXT,
      0,
      0,
      0,
      ATA_CMD_WRITE_FUA_EXT
};

/**
 *    ata_rwcmd_protocol - set taskfile r/w commands and protocol
 *    @tf: command to examine and configure
 *    @dev: device tf belongs to
 *
 *    Examine the device configuration and tf->flags to calculate
 *    the proper read/write commands and protocol to use.
 *
 *    LOCKING:
 *    caller.
 */
static int ata_rwcmd_protocol(struct ata_taskfile *tf, struct ata_device *dev)
{
      u8 cmd;

      int index, fua, lba48, write;

      fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
      lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
      write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;

      if (dev->flags & ATA_DFLAG_PIO) {
            tf->protocol = ATA_PROT_PIO;
            index = dev->multi_count ? 0 : 8;
      } else if (lba48 && (dev->link->ap->flags & ATA_FLAG_PIO_LBA48)) {
            /* Unable to use DMA due to host limitation */
            tf->protocol = ATA_PROT_PIO;
            index = dev->multi_count ? 0 : 8;
      } else {
            tf->protocol = ATA_PROT_DMA;
            index = 16;
      }

      cmd = ata_rw_cmds[index + fua + lba48 + write];
      if (cmd) {
            tf->command = cmd;
            return 0;
      }
      return -1;
}

/**
 *    ata_tf_read_block - Read block address from ATA taskfile
 *    @tf: ATA taskfile of interest
 *    @dev: ATA device @tf belongs to
 *
 *    LOCKING:
 *    None.
 *
 *    Read block address from @tf.  This function can handle all
 *    three address formats - LBA, LBA48 and CHS.  tf->protocol and
 *    flags select the address format to use.
 *
 *    RETURNS:
 *    Block address read from @tf.
 */
u64 ata_tf_read_block(struct ata_taskfile *tf, struct ata_device *dev)
{
      u64 block = 0;

      if (tf->flags & ATA_TFLAG_LBA) {
            if (tf->flags & ATA_TFLAG_LBA48) {
                  block |= (u64)tf->hob_lbah << 40;
                  block |= (u64)tf->hob_lbam << 32;
                  block |= tf->hob_lbal << 24;
            } else
                  block |= (tf->device & 0xf) << 24;

            block |= tf->lbah << 16;
            block |= tf->lbam << 8;
            block |= tf->lbal;
      } else {
            u32 cyl, head, sect;

            cyl = tf->lbam | (tf->lbah << 8);
            head = tf->device & 0xf;
            sect = tf->lbal;

            block = (cyl * dev->heads + head) * dev->sectors + sect;
      }

      return block;
}

/**
 *    ata_build_rw_tf - Build ATA taskfile for given read/write request
 *    @tf: Target ATA taskfile
 *    @dev: ATA device @tf belongs to
 *    @block: Block address
 *    @n_block: Number of blocks
 *    @tf_flags: RW/FUA etc...
 *    @tag: tag
 *
 *    LOCKING:
 *    None.
 *
 *    Build ATA taskfile @tf for read/write request described by
 *    @block, @n_block, @tf_flags and @tag on @dev.
 *
 *    RETURNS:
 *
 *    0 on success, -ERANGE if the request is too large for @dev,
 *    -EINVAL if the request is invalid.
 */
int ata_build_rw_tf(struct ata_taskfile *tf, struct ata_device *dev,
                u64 block, u32 n_block, unsigned int tf_flags,
                unsigned int tag)
{
      tf->flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
      tf->flags |= tf_flags;

      if (ata_ncq_enabled(dev) && likely(tag != ATA_TAG_INTERNAL)) {
            /* yay, NCQ */
            if (!lba_48_ok(block, n_block))
                  return -ERANGE;

            tf->protocol = ATA_PROT_NCQ;
            tf->flags |= ATA_TFLAG_LBA | ATA_TFLAG_LBA48;

            if (tf->flags & ATA_TFLAG_WRITE)
                  tf->command = ATA_CMD_FPDMA_WRITE;
            else
                  tf->command = ATA_CMD_FPDMA_READ;

            tf->nsect = tag << 3;
            tf->hob_feature = (n_block >> 8) & 0xff;
            tf->feature = n_block & 0xff;

            tf->hob_lbah = (block >> 40) & 0xff;
            tf->hob_lbam = (block >> 32) & 0xff;
            tf->hob_lbal = (block >> 24) & 0xff;
            tf->lbah = (block >> 16) & 0xff;
            tf->lbam = (block >> 8) & 0xff;
            tf->lbal = block & 0xff;

            tf->device = 1 << 6;
            if (tf->flags & ATA_TFLAG_FUA)
                  tf->device |= 1 << 7;
      } else if (dev->flags & ATA_DFLAG_LBA) {
            tf->flags |= ATA_TFLAG_LBA;

            if (lba_28_ok(block, n_block)) {
                  /* use LBA28 */
                  tf->device |= (block >> 24) & 0xf;
            } else if (lba_48_ok(block, n_block)) {
                  if (!(dev->flags & ATA_DFLAG_LBA48))
                        return -ERANGE;

                  /* use LBA48 */
                  tf->flags |= ATA_TFLAG_LBA48;

                  tf->hob_nsect = (n_block >> 8) & 0xff;

                  tf->hob_lbah = (block >> 40) & 0xff;
                  tf->hob_lbam = (block >> 32) & 0xff;
                  tf->hob_lbal = (block >> 24) & 0xff;
            } else
                  /* request too large even for LBA48 */
                  return -ERANGE;

            if (unlikely(ata_rwcmd_protocol(tf, dev) < 0))
                  return -EINVAL;

            tf->nsect = n_block & 0xff;

            tf->lbah = (block >> 16) & 0xff;
            tf->lbam = (block >> 8) & 0xff;
            tf->lbal = block & 0xff;

            tf->device |= ATA_LBA;
      } else {
            /* CHS */
            u32 sect, head, cyl, track;

            /* The request -may- be too large for CHS addressing. */
            if (!lba_28_ok(block, n_block))
                  return -ERANGE;

            if (unlikely(ata_rwcmd_protocol(tf, dev) < 0))
                  return -EINVAL;

            /* Convert LBA to CHS */
            track = (u32)block / dev->sectors;
            cyl   = track / dev->heads;
            head  = track % dev->heads;
            sect  = (u32)block % dev->sectors + 1;

            DPRINTK("block %u track %u cyl %u head %u sect %u\n",
                  (u32)block, track, cyl, head, sect);

            /* Check whether the converted CHS can fit.
               Cylinder: 0-65535
               Head: 0-15
               Sector: 1-255*/
            if ((cyl >> 16) || (head >> 4) || (sect >> 8) || (!sect))
                  return -ERANGE;

            tf->nsect = n_block & 0xff; /* Sector count 0 means 256 sectors */
            tf->lbal = sect;
            tf->lbam = cyl;
            tf->lbah = cyl >> 8;
            tf->device |= head;
      }

      return 0;
}

/**
 *    ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
 *    @pio_mask: pio_mask
 *    @mwdma_mask: mwdma_mask
 *    @udma_mask: udma_mask
 *
 *    Pack @pio_mask, @mwdma_mask and @udma_mask into a single
 *    unsigned int xfer_mask.
 *
 *    LOCKING:
 *    None.
 *
 *    RETURNS:
 *    Packed xfer_mask.
 */
static unsigned int ata_pack_xfermask(unsigned int pio_mask,
                              unsigned int mwdma_mask,
                              unsigned int udma_mask)
{
      return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
            ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
            ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
}

/**
 *    ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
 *    @xfer_mask: xfer_mask to unpack
 *    @pio_mask: resulting pio_mask
 *    @mwdma_mask: resulting mwdma_mask
 *    @udma_mask: resulting udma_mask
 *
 *    Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
 *    Any NULL distination masks will be ignored.
 */
static void ata_unpack_xfermask(unsigned int xfer_mask,
                        unsigned int *pio_mask,
                        unsigned int *mwdma_mask,
                        unsigned int *udma_mask)
{
      if (pio_mask)
            *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
      if (mwdma_mask)
            *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
      if (udma_mask)
            *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
}

static const struct ata_xfer_ent {
      int shift, bits;
      u8 base;
} ata_xfer_tbl[] = {
      { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
      { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
      { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
      { -1, },
};

/**
 *    ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
 *    @xfer_mask: xfer_mask of interest
 *
 *    Return matching XFER_* value for @xfer_mask.  Only the highest
 *    bit of @xfer_mask is considered.
 *
 *    LOCKING:
 *    None.
 *
 *    RETURNS:
 *    Matching XFER_* value, 0 if no match found.
 */
static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
{
      int highbit = fls(xfer_mask) - 1;
      const struct ata_xfer_ent *ent;

      for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
            if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
                  return ent->base + highbit - ent->shift;
      return 0;
}

/**
 *    ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
 *    @xfer_mode: XFER_* of interest
 *
 *    Return matching xfer_mask for @xfer_mode.
 *
 *    LOCKING:
 *    None.
 *
 *    RETURNS:
 *    Matching xfer_mask, 0 if no match found.
 */
static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
{
      const struct ata_xfer_ent *ent;

      for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
            if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
                  return 1 << (ent->shift + xfer_mode - ent->base);
      return 0;
}

/**
 *    ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
 *    @xfer_mode: XFER_* of interest
 *
 *    Return matching xfer_shift for @xfer_mode.
 *
 *    LOCKING:
 *    None.
 *
 *    RETURNS:
 *    Matching xfer_shift, -1 if no match found.
 */
static int ata_xfer_mode2shift(unsigned int xfer_mode)
{
      const struct ata_xfer_ent *ent;

      for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
            if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
                  return ent->shift;
      return -1;
}

/**
 *    ata_mode_string - convert xfer_mask to string
 *    @xfer_mask: mask of bits supported; only highest bit counts.
 *
 *    Determine string which represents the highest speed
 *    (highest bit in @modemask).
 *
 *    LOCKING:
 *    None.
 *
 *    RETURNS:
 *    Constant C string representing highest speed listed in
 *    @mode_mask, or the constant C string "<n/a>".
 */
static const char *ata_mode_string(unsigned int xfer_mask)
{
      static const char * const xfer_mode_str[] = {
            "PIO0",
            "PIO1",
            "PIO2",
            "PIO3",
            "PIO4",
            "PIO5",
            "PIO6",
            "MWDMA0",
            "MWDMA1",
            "MWDMA2",
            "MWDMA3",
            "MWDMA4",
            "UDMA/16",
            "UDMA/25",
            "UDMA/33",
            "UDMA/44",
            "UDMA/66",
            "UDMA/100",
            "UDMA/133",
            "UDMA7",
      };
      int highbit;

      highbit = fls(xfer_mask) - 1;
      if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
            return xfer_mode_str[highbit];
      return "<n/a>";
}

static const char *sata_spd_string(unsigned int spd)
{
      static const char * const spd_str[] = {
            "1.5 Gbps",
            "3.0 Gbps",
      };

      if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
            return "<unknown>";
      return spd_str[spd - 1];
}

void ata_dev_disable(struct ata_device *dev)
{
      if (ata_dev_enabled(dev)) {
            if (ata_msg_drv(dev->link->ap))
                  ata_dev_printk(dev, KERN_WARNING, "disabled\n");
            ata_acpi_on_disable(dev);
            ata_down_xfermask_limit(dev, ATA_DNXFER_FORCE_PIO0 |
                                   ATA_DNXFER_QUIET);
            dev->class++;
      }
}

static int ata_dev_set_dipm(struct ata_device *dev, enum link_pm policy)
{
      struct ata_link *link = dev->link;
      struct ata_port *ap = link->ap;
      u32 scontrol;
      unsigned int err_mask;
      int rc;

      /*
       * disallow DIPM for drivers which haven't set
       * ATA_FLAG_IPM.  This is because when DIPM is enabled,
       * phy ready will be set in the interrupt status on
       * state changes, which will cause some drivers to
       * think there are errors - additionally drivers will
       * need to disable hot plug.
       */
      if (!(ap->flags & ATA_FLAG_IPM) || !ata_dev_enabled(dev)) {
            ap->pm_policy = NOT_AVAILABLE;
            return -EINVAL;
      }

      /*
       * For DIPM, we will only enable it for the
       * min_power setting.
       *
       * Why?  Because Disks are too stupid to know that
       * If the host rejects a request to go to SLUMBER
       * they should retry at PARTIAL, and instead it
       * just would give up.  So, for medium_power to
       * work at all, we need to only allow HIPM.
       */
      rc = sata_scr_read(link, SCR_CONTROL, &scontrol);
      if (rc)
            return rc;

      switch (policy) {
      case MIN_POWER:
            /* no restrictions on IPM transitions */
            scontrol &= ~(0x3 << 8);
            rc = sata_scr_write(link, SCR_CONTROL, scontrol);
            if (rc)
                  return rc;

            /* enable DIPM */
            if (dev->flags & ATA_DFLAG_DIPM)
                  err_mask = ata_dev_set_feature(dev,
                              SETFEATURES_SATA_ENABLE, SATA_DIPM);
            break;
      case MEDIUM_POWER:
            /* allow IPM to PARTIAL */
            scontrol &= ~(0x1 << 8);
            scontrol |= (0x2 << 8);
            rc = sata_scr_write(link, SCR_CONTROL, scontrol);
            if (rc)
                  return rc;

            /*
             * we don't have to disable DIPM since IPM flags
             * disallow transitions to SLUMBER, which effectively
             * disable DIPM if it does not support PARTIAL
             */
            break;
      case NOT_AVAILABLE:
      case MAX_PERFORMANCE:
            /* disable all IPM transitions */
            scontrol |= (0x3 << 8);
            rc = sata_scr_write(link, SCR_CONTROL, scontrol);
            if (rc)
                  return rc;

            /*
             * we don't have to disable DIPM since IPM flags
             * disallow all transitions which effectively
             * disable DIPM anyway.
             */
            break;
      }

      /* FIXME: handle SET FEATURES failure */
      (void) err_mask;

      return 0;
}

/**
 *    ata_dev_enable_pm - enable SATA interface power management
 *    @dev:  device to enable power management
 *    @policy: the link power management policy
 *
 *    Enable SATA Interface power management.  This will enable
 *    Device Interface Power Management (DIPM) for min_power
 *    policy, and then call driver specific callbacks for
 *    enabling Host Initiated Power management.
 *
 *    Locking: Caller.
 *    Returns: -EINVAL if IPM is not supported, 0 otherwise.
 */
void ata_dev_enable_pm(struct ata_device *dev, enum link_pm policy)
{
      int rc = 0;
      struct ata_port *ap = dev->link->ap;

      /* set HIPM first, then DIPM */
      if (ap->ops->enable_pm)
            rc = ap->ops->enable_pm(ap, policy);
      if (rc)
            goto enable_pm_out;
      rc = ata_dev_set_dipm(dev, policy);

enable_pm_out:
      if (rc)
            ap->pm_policy = MAX_PERFORMANCE;
      else
            ap->pm_policy = policy;
      return /* rc */;  /* hopefully we can use 'rc' eventually */
}

#ifdef CONFIG_PM
/**
 *    ata_dev_disable_pm - disable SATA interface power management
 *    @dev: device to disable power management
 *
 *    Disable SATA Interface power management.  This will disable
 *    Device Interface Power Management (DIPM) without changing
 *    policy,  call driver specific callbacks for disabling Host
 *    Initiated Power management.
 *
 *    Locking: Caller.
 *    Returns: void
 */
static void ata_dev_disable_pm(struct ata_device *dev)
{
      struct ata_port *ap = dev->link->ap;

      ata_dev_set_dipm(dev, MAX_PERFORMANCE);
      if (ap->ops->disable_pm)
            ap->ops->disable_pm(ap);
}
#endif      /* CONFIG_PM */

void ata_lpm_schedule(struct ata_port *ap, enum link_pm policy)
{
      ap->pm_policy = policy;
      ap->link.eh_info.action |= ATA_EHI_LPM;
      ap->link.eh_info.flags |= ATA_EHI_NO_AUTOPSY;
      ata_port_schedule_eh(ap);
}

#ifdef CONFIG_PM
static void ata_lpm_enable(struct ata_host *host)
{
      struct ata_link *link;
      struct ata_port *ap;
      struct ata_device *dev;
      int i;

      for (i = 0; i < host->n_ports; i++) {
            ap = host->ports[i];
            ata_port_for_each_link(link, ap) {
                  ata_link_for_each_dev(dev, link)
                        ata_dev_disable_pm(dev);
            }
      }
}

static void ata_lpm_disable(struct ata_host *host)
{
      int i;

      for (i = 0; i < host->n_ports; i++) {
            struct ata_port *ap = host->ports[i];
            ata_lpm_schedule(ap, ap->pm_policy);
      }
}
#endif      /* CONFIG_PM */


/**
 *    ata_devchk - PATA device presence detection
 *    @ap: ATA channel to examine
 *    @device: Device to examine (starting at zero)
 *
 *    This technique was originally described in
 *    Hale Landis's ATADRVR (www.ata-atapi.com), and
 *    later found its way into the ATA/ATAPI spec.
 *
 *    Write a pattern to the ATA shadow registers,
 *    and if a device is present, it will respond by
 *    correctly storing and echoing back the
 *    ATA shadow register contents.
 *
 *    LOCKING:
 *    caller.
 */

static unsigned int ata_devchk(struct ata_port *ap, unsigned int device)
{
      struct ata_ioports *ioaddr = &ap->ioaddr;
      u8 nsect, lbal;

      ap->ops->dev_select(ap, device);

      iowrite8(0x55, ioaddr->nsect_addr);
      iowrite8(0xaa, ioaddr->lbal_addr);

      iowrite8(0xaa, ioaddr->nsect_addr);
      iowrite8(0x55, ioaddr->lbal_addr);

      iowrite8(0x55, ioaddr->nsect_addr);
      iowrite8(0xaa, ioaddr->lbal_addr);

      nsect = ioread8(ioaddr->nsect_addr);
      lbal = ioread8(ioaddr->lbal_addr);

      if ((nsect == 0x55) && (lbal == 0xaa))
            return 1;   /* we found a device */

      return 0;         /* nothing found */
}

/**
 *    ata_dev_classify - determine device type based on ATA-spec signature
 *    @tf: ATA taskfile register set for device to be identified
 *
 *    Determine from taskfile register contents whether a device is
 *    ATA or ATAPI, as per "Signature and persistence" section
 *    of ATA/PI spec (volume 1, sect 5.14).
 *
 *    LOCKING:
 *    None.
 *
 *    RETURNS:
 *    Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, %ATA_DEV_PMP or
 *    %ATA_DEV_UNKNOWN the event of failure.
 */
unsigned int ata_dev_classify(const struct ata_taskfile *tf)
{
      /* Apple's open source Darwin code hints that some devices only
       * put a proper signature into the LBA mid/high registers,
       * So, we only check those.  It's sufficient for uniqueness.
       *
       * ATA/ATAPI-7 (d1532v1r1: Feb. 19, 2003) specified separate
       * signatures for ATA and ATAPI devices attached on SerialATA,
       * 0x3c/0xc3 and 0x69/0x96 respectively.  However, SerialATA
       * spec has never mentioned about using different signatures
       * for ATA/ATAPI devices.  Then, Serial ATA II: Port
       * Multiplier specification began to use 0x69/0x96 to identify
       * port multpliers and 0x3c/0xc3 to identify SEMB device.
       * ATA/ATAPI-7 dropped descriptions about 0x3c/0xc3 and
       * 0x69/0x96 shortly and described them as reserved for
       * SerialATA.
       *
       * We follow the current spec and consider that 0x69/0x96
       * identifies a port multiplier and 0x3c/0xc3 a SEMB device.
       */
      if ((tf->lbam == 0) && (tf->lbah == 0)) {
            DPRINTK("found ATA device by sig\n");
            return ATA_DEV_ATA;
      }

      if ((tf->lbam == 0x14) && (tf->lbah == 0xeb)) {
            DPRINTK("found ATAPI device by sig\n");
            return ATA_DEV_ATAPI;
      }

      if ((tf->lbam == 0x69) && (tf->lbah == 0x96)) {
            DPRINTK("found PMP device by sig\n");
            return ATA_DEV_PMP;
      }

      if ((tf->lbam == 0x3c) && (tf->lbah == 0xc3)) {
            printk(KERN_INFO "ata: SEMB device ignored\n");
            return ATA_DEV_SEMB_UNSUP; /* not yet */
      }

      DPRINTK("unknown device\n");
      return ATA_DEV_UNKNOWN;
}

/**
 *    ata_dev_try_classify - Parse returned ATA device signature
 *    @dev: ATA device to classify (starting at zero)
 *    @present: device seems present
 *    @r_err: Value of error register on completion
 *
 *    After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
 *    an ATA/ATAPI-defined set of values is placed in the ATA
 *    shadow registers, indicating the results of device detection
 *    and diagnostics.
 *
 *    Select the ATA device, and read the values from the ATA shadow
 *    registers.  Then parse according to the Error register value,
 *    and the spec-defined values examined by ata_dev_classify().
 *
 *    LOCKING:
 *    caller.
 *
 *    RETURNS:
 *    Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
 */
unsigned int ata_dev_try_classify(struct ata_device *dev, int present,
                          u8 *r_err)
{
      struct ata_port *ap = dev->link->ap;
      struct ata_taskfile tf;
      unsigned int class;
      u8 err;

      ap->ops->dev_select(ap, dev->devno);

      memset(&tf, 0, sizeof(tf));

      ap->ops->tf_read(ap, &tf);
      err = tf.feature;
      if (r_err)
            *r_err = err;

      /* see if device passed diags: if master then continue and warn later */
      if (err == 0 && dev->devno == 0)
            /* diagnostic fail : do nothing _YET_ */
            dev->horkage |= ATA_HORKAGE_DIAGNOSTIC;
      else if (err == 1)
            /* do nothing */ ;
      else if ((dev->devno == 0) && (err == 0x81))
            /* do nothing */ ;
      else
            return ATA_DEV_NONE;

      /* determine if device is ATA or ATAPI */
      class = ata_dev_classify(&tf);

      if (class == ATA_DEV_UNKNOWN) {
            /* If the device failed diagnostic, it's likely to
             * have reported incorrect device signature too.
             * Assume ATA device if the device seems present but
             * device signature is invalid with diagnostic
             * failure.
             */
            if (present && (dev->horkage & ATA_HORKAGE_DIAGNOSTIC))
                  class = ATA_DEV_ATA;
            else
                  class = ATA_DEV_NONE;
      } else if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
            class = ATA_DEV_NONE;

      return class;
}

/**
 *    ata_id_string - Convert IDENTIFY DEVICE page into string
 *    @id: IDENTIFY DEVICE results we will examine
 *    @s: string into which data is output
 *    @ofs: offset into identify device page
 *    @len: length of string to return. must be an even number.
 *
 *    The strings in the IDENTIFY DEVICE page are broken up into
 *    16-bit chunks.  Run through the string, and output each
 *    8-bit chunk linearly, regardless of platform.
 *
 *    LOCKING:
 *    caller.
 */

void ata_id_string(const u16 *id, unsigned char *s,
               unsigned int ofs, unsigned int len)
{
      unsigned int c;

      while (len > 0) {
            c = id[ofs] >> 8;
            *s = c;
            s++;

            c = id[ofs] & 0xff;
            *s = c;
            s++;

            ofs++;
            len -= 2;
      }
}

/**
 *    ata_id_c_string - Convert IDENTIFY DEVICE page into C string
 *    @id: IDENTIFY DEVICE results we will examine
 *    @s: string into which data is output
 *    @ofs: offset into identify device page
 *    @len: length of string to return. must be an odd number.
 *
 *    This function is identical to ata_id_string except that it
 *    trims trailing spaces and terminates the resulting string with
 *    null.  @len must be actual maximum length (even number) + 1.
 *
 *    LOCKING:
 *    caller.
 */
void ata_id_c_string(const u16 *id, unsigned char *s,
                 unsigned int ofs, unsigned int len)
{
      unsigned char *p;

      WARN_ON(!(len & 1));

      ata_id_string(id, s, ofs, len - 1);

      p = s + strnlen(s, len - 1);
      while (p > s && p[-1] == ' ')
            p--;
      *p = '\0';
}

static u64 ata_id_n_sectors(const u16 *id)
{
      if (ata_id_has_lba(id)) {
            if (ata_id_has_lba48(id))
                  return ata_id_u64(id, 100);
            else
                  return ata_id_u32(id, 60);
      } else {
            if (ata_id_current_chs_valid(id))
                  return ata_id_u32(id, 57);
            else
                  return id[1] * id[3] * id[6];
      }
}

static u64 ata_tf_to_lba48(struct ata_taskfile *tf)
{
      u64 sectors = 0;

      sectors |= ((u64)(tf->hob_lbah & 0xff)) << 40;
      sectors |= ((u64)(tf->hob_lbam & 0xff)) << 32;
      sectors |= (tf->hob_lbal & 0xff) << 24;
      sectors |= (tf->lbah & 0xff) << 16;
      sectors |= (tf->lbam & 0xff) << 8;
      sectors |= (tf->lbal & 0xff);

      return ++sectors;
}

static u64 ata_tf_to_lba(struct ata_taskfile *tf)
{
      u64 sectors = 0;

      sectors |= (tf->device & 0x0f) << 24;
      sectors |= (tf->lbah & 0xff) << 16;
      sectors |= (tf->lbam & 0xff) << 8;
      sectors |= (tf->lbal & 0xff);

      return ++sectors;
}

/**
 *    ata_read_native_max_address - Read native max address
 *    @dev: target device
 *    @max_sectors: out parameter for the result native max address
 *
 *    Perform an LBA48 or LBA28 native size query upon the device in
 *    question.
 *
 *    RETURNS:
 *    0 on success, -EACCES if command is aborted by the drive.
 *    -EIO on other errors.
 */
static int ata_read_native_max_address(struct ata_device *dev, u64 *max_sectors)
{
      unsigned int err_mask;
      struct ata_taskfile tf;
      int lba48 = ata_id_has_lba48(dev->id);

      ata_tf_init(dev, &tf);

      /* always clear all address registers */
      tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR;

      if (lba48) {
            tf.command = ATA_CMD_READ_NATIVE_MAX_EXT;
            tf.flags |= ATA_TFLAG_LBA48;
      } else
            tf.command = ATA_CMD_READ_NATIVE_MAX;

      tf.protocol |= ATA_PROT_NODATA;
      tf.device |= ATA_LBA;

      err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
      if (err_mask) {
            ata_dev_printk(dev, KERN_WARNING, "failed to read native "
                         "max address (err_mask=0x%x)\n", err_mask);
            if (err_mask == AC_ERR_DEV && (tf.feature & ATA_ABORTED))
                  return -EACCES;
            return -EIO;
      }

      if (lba48)
            *max_sectors = ata_tf_to_lba48(&tf);
      else
            *max_sectors = ata_tf_to_lba(&tf);
      if (dev->horkage & ATA_HORKAGE_HPA_SIZE)
            (*max_sectors)--;
      return 0;
}

/**
 *    ata_set_max_sectors - Set max sectors
 *    @dev: target device
 *    @new_sectors: new max sectors value to set for the device
 *
 *    Set max sectors of @dev to @new_sectors.
 *
 *    RETURNS:
 *    0 on success, -EACCES if command is aborted or denied (due to
 *    previous non-volatile SET_MAX) by the drive.  -EIO on other
 *    errors.
 */
static int ata_set_max_sectors(struct ata_device *dev, u64 new_sectors)
{
      unsigned int err_mask;
      struct ata_taskfile tf;
      int lba48 = ata_id_has_lba48(dev->id);

      new_sectors--;

      ata_tf_init(dev, &tf);

      tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR;

      if (lba48) {
            tf.command = ATA_CMD_SET_MAX_EXT;
            tf.flags |= ATA_TFLAG_LBA48;

            tf.hob_lbal = (new_sectors >> 24) & 0xff;
            tf.hob_lbam = (new_sectors >> 32) & 0xff;
            tf.hob_lbah = (new_sectors >> 40) & 0xff;
      } else {
            tf.command = ATA_CMD_SET_MAX;

            tf.device |= (new_sectors >> 24) & 0xf;
      }

      tf.protocol |= ATA_PROT_NODATA;
      tf.device |= ATA_LBA;

      tf.lbal = (new_sectors >> 0) & 0xff;
      tf.lbam = (new_sectors >> 8) & 0xff;
      tf.lbah = (new_sectors >> 16) & 0xff;

      err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
      if (err_mask) {
            ata_dev_printk(dev, KERN_WARNING, "failed to set "
                         "max address (err_mask=0x%x)\n", err_mask);
            if (err_mask == AC_ERR_DEV &&
                (tf.feature & (ATA_ABORTED | ATA_IDNF)))
                  return -EACCES;
            return -EIO;
      }

      return 0;
}

/**
 *    ata_hpa_resize          -     Resize a device with an HPA set
 *    @dev: Device to resize
 *
 *    Read the size of an LBA28 or LBA48 disk with HPA features and resize
 *    it if required to the full size of the media. The caller must check
 *    the drive has the HPA feature set enabled.
 *
 *    RETURNS:
 *    0 on success, -errno on failure.
 */
static int ata_hpa_resize(struct ata_device *dev)
{
      struct ata_eh_context *ehc = &dev->link->eh_context;
      int print_info = ehc->i.flags & ATA_EHI_PRINTINFO;
      u64 sectors = ata_id_n_sectors(dev->id);
      u64 native_sectors;
      int rc;

      /* do we need to do it? */
      if (dev->class != ATA_DEV_ATA ||
          !ata_id_has_lba(dev->id) || !ata_id_hpa_enabled(dev->id) ||
          (dev->horkage & ATA_HORKAGE_BROKEN_HPA))
            return 0;

      /* read native max address */
      rc = ata_read_native_max_address(dev, &native_sectors);
      if (rc) {
            /* If HPA isn't going to be unlocked, skip HPA
             * resizing from the next try.
             */
            if (!ata_ignore_hpa) {
                  ata_dev_printk(dev, KERN_WARNING, "HPA support seems "
                               "broken, will skip HPA handling\n");
                  dev->horkage |= ATA_HORKAGE_BROKEN_HPA;

                  /* we can continue if device aborted the command */
                  if (rc == -EACCES)
                        rc = 0;
            }

            return rc;
      }

      /* nothing to do? */
      if (native_sectors <= sectors || !ata_ignore_hpa) {
            if (!print_info || native_sectors == sectors)
                  return 0;

            if (native_sectors > sectors)
                  ata_dev_printk(dev, KERN_INFO,
                        "HPA detected: current %llu, native %llu\n",
                        (unsigned long long)sectors,
                        (unsigned long long)native_sectors);
            else if (native_sectors < sectors)
                  ata_dev_printk(dev, KERN_WARNING,
                        "native sectors (%llu) is smaller than "
                        "sectors (%llu)\n",
                        (unsigned long long)native_sectors,
                        (unsigned long long)sectors);
            return 0;
      }

      /* let's unlock HPA */
      rc = ata_set_max_sectors(dev, native_sectors);
      if (rc == -EACCES) {
            /* if device aborted the command, skip HPA resizing */
            ata_dev_printk(dev, KERN_WARNING, "device aborted resize "
                         "(%llu -> %llu), skipping HPA handling\n",
                         (unsigned long long)sectors,
                         (unsigned long long)native_sectors);
            dev->horkage |= ATA_HORKAGE_BROKEN_HPA;
            return 0;
      } else if (rc)
            return rc;

      /* re-read IDENTIFY data */
      rc = ata_dev_reread_id(dev, 0);
      if (rc) {
            ata_dev_printk(dev, KERN_ERR, "failed to re-read IDENTIFY "
                         "data after HPA resizing\n");
            return rc;
      }

      if (print_info) {
            u64 new_sectors = ata_id_n_sectors(dev->id);
            ata_dev_printk(dev, KERN_INFO,
                  "HPA unlocked: %llu -> %llu, native %llu\n",
                  (unsigned long long)sectors,
                  (unsigned long long)new_sectors,
                  (unsigned long long)native_sectors);
      }

      return 0;
}

/**
 *    ata_id_to_dma_mode      -     Identify DMA mode from id block
 *    @dev: device to identify
 *    @unknown: mode to assume if we cannot tell
 *
 *    Set up the timing values for the device based upon the identify
 *    reported values for the DMA mode. This function is used by drivers
 *    which rely upon firmware configured modes, but wish to report the
 *    mode correctly when possible.
 *
 *    In addition we emit similarly formatted messages to the default
 *    ata_dev_set_mode handler, in order to provide consistency of
 *    presentation.
 */

void ata_id_to_dma_mode(struct ata_device *dev, u8 unknown)
{
      unsigned int mask;
      u8 mode;

      /* Pack the DMA modes */
      mask = ((dev->id[63] >> 8) << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA;
      if (dev->id[53] & 0x04)
            mask |= ((dev->id[88] >> 8) << ATA_SHIFT_UDMA) & ATA_MASK_UDMA;

      /* Select the mode in use */
      mode = ata_xfer_mask2mode(mask);

      if (mode != 0) {
            ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
                   ata_mode_string(mask));
      } else {
            /* SWDMA perhaps ? */
            mode = unknown;
            ata_dev_printk(dev, KERN_INFO, "configured for DMA\n");
      }

      /* Configure the device reporting */
      dev->xfer_mode = mode;
      dev->xfer_shift = ata_xfer_mode2shift(mode);
}

/**
 *    ata_noop_dev_select - Select device 0/1 on ATA bus
 *    @ap: ATA channel to manipulate
 *    @device: ATA device (numbered from zero) to select
 *
 *    This function performs no actual function.
 *
 *    May be used as the dev_select() entry in ata_port_operations.
 *
 *    LOCKING:
 *    caller.
 */
void ata_noop_dev_select(struct ata_port *ap, unsigned int device)
{
}


/**
 *    ata_std_dev_select - Select device 0/1 on ATA bus
 *    @ap: ATA channel to manipulate
 *    @device: ATA device (numbered from zero) to select
 *
 *    Use the method defined in the ATA specification to
 *    make either device 0, or device 1, active on the
 *    ATA channel.  Works with both PIO and MMIO.
 *
 *    May be used as the dev_select() entry in ata_port_operations.
 *
 *    LOCKING:
 *    caller.
 */

void ata_std_dev_select(struct ata_port *ap, unsigned int device)
{
      u8 tmp;

      if (device == 0)
            tmp = ATA_DEVICE_OBS;
      else
            tmp = ATA_DEVICE_OBS | ATA_DEV1;

      iowrite8(tmp, ap->ioaddr.device_addr);
      ata_pause(ap);          /* needed; also flushes, for mmio */
}

/**
 *    ata_dev_select - Select device 0/1 on ATA bus
 *    @ap: ATA channel to manipulate
 *    @device: ATA device (numbered from zero) to select
 *    @wait: non-zero to wait for Status register BSY bit to clear
 *    @can_sleep: non-zero if context allows sleeping
 *
 *    Use the method defined in the ATA specification to
 *    make either device 0, or device 1, active on the
 *    ATA channel.
 *
 *    This is a high-level version of ata_std_dev_select(),
 *    which additionally provides the services of inserting
 *    the proper pauses and status polling, where needed.
 *
 *    LOCKING:
 *    caller.
 */

void ata_dev_select(struct ata_port *ap, unsigned int device,
                     unsigned int wait, unsigned int can_sleep)
{
      if (ata_msg_probe(ap))
            ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, "
                        "device %u, wait %u\n", device, wait);

      if (wait)
            ata_wait_idle(ap);

      ap->ops->dev_select(ap, device);

      if (wait) {
            if (can_sleep && ap->link.device[device].class == ATA_DEV_ATAPI)
                  msleep(150);
            ata_wait_idle(ap);
      }
}

/**
 *    ata_dump_id - IDENTIFY DEVICE info debugging output
 *    @id: IDENTIFY DEVICE page to dump
 *
 *    Dump selected 16-bit words from the given IDENTIFY DEVICE
 *    page.
 *
 *    LOCKING:
 *    caller.
 */

static inline void ata_dump_id(const u16 *id)
{
      DPRINTK("49==0x%04x  "
            "53==0x%04x  "
            "63==0x%04x  "
            "64==0x%04x  "
            "75==0x%04x  \n",
            id[49],
            id[53],
            id[63],
            id[64],
            id[75]);
      DPRINTK("80==0x%04x  "
            "81==0x%04x  "
            "82==0x%04x  "
            "83==0x%04x  "
            "84==0x%04x  \n",
            id[80],
            id[81],
            id[82],
            id[83],
            id[84]);
      DPRINTK("88==0x%04x  "
            "93==0x%04x\n",
            id[88],
            id[93]);
}

/**
 *    ata_id_xfermask - Compute xfermask from the given IDENTIFY data
 *    @id: IDENTIFY data to compute xfer mask from
 *
 *    Compute the xfermask for this device. This is not as trivial
 *    as it seems if we must consider early devices correctly.
 *
 *    FIXME: pre IDE drive timing (do we care ?).
 *
 *    LOCKING:
 *    None.
 *
 *    RETURNS:
 *    Computed xfermask
 */
static unsigned int ata_id_xfermask(const u16 *id)
{
      unsigned int pio_mask, mwdma_mask, udma_mask;

      /* Usual case. Word 53 indicates word 64 is valid */
      if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
            pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
            pio_mask <<= 3;
            pio_mask |= 0x7;
      } else {
            /* If word 64 isn't valid then Word 51 high byte holds
             * the PIO timing number for the maximum. Turn it into
             * a mask.
             */
            u8 mode = (id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF;
            if (mode < 5)     /* Valid PIO range */
                  pio_mask = (2 << mode) - 1;
            else
                  pio_mask = 1;

            /* But wait.. there's more. Design your standards by
             * committee and you too can get a free iordy field to
             * process. However its the speeds not the modes that
             * are supported... Note drivers using the timing API
             * will get this right anyway
             */
      }

      mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;

      if (ata_id_is_cfa(id)) {
            /*
             *    Process compact flash extended modes
             */
            int pio = id[163] & 0x7;
            int dma = (id[163] >> 3) & 7;

            if (pio)
                  pio_mask |= (1 << 5);
            if (pio > 1)
                  pio_mask |= (1 << 6);
            if (dma)
                  mwdma_mask |= (1 << 3);
            if (dma > 1)
                  mwdma_mask |= (1 << 4);
      }

      udma_mask = 0;
      if (id[ATA_ID_FIELD_VALID] & (1 << 2))
            udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;

      return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
}

/**
 *    ata_port_queue_task - Queue port_task
 *    @ap: The ata_port to queue port_task for
 *    @fn: workqueue function to be scheduled
 *    @data: data for @fn to use
 *    @delay: delay time for workqueue function
 *
 *    Schedule @fn(@data) for execution after @delay jiffies using
 *    port_task.  There is one port_task per port and it's the
 *    user(low level driver)'s responsibility to make sure that only
 *    one task is active at any given time.
 *
 *    libata core layer takes care of synchronization between
 *    port_task and EH.  ata_port_queue_task() may be ignored for EH
 *    synchronization.
 *
 *    LOCKING:
 *    Inherited from caller.
 */
void ata_port_queue_task(struct ata_port *ap, work_func_t fn, void *data,
                   unsigned long delay)
{
      PREPARE_DELAYED_WORK(&ap->port_task, fn);
      ap->port_task_data = data;

      /* may fail if ata_port_flush_task() in progress */
      queue_delayed_work(ata_wq, &ap->port_task, delay);
}

/**
 *    ata_port_flush_task - Flush port_task
 *    @ap: The ata_port to flush port_task for
 *
 *    After this function completes, port_task is guranteed not to
 *    be running or scheduled.
 *
 *    LOCKING:
 *    Kernel thread context (may sleep)
 */
void ata_port_flush_task(struct ata_port *ap)
{
      DPRINTK("ENTER\n");

      cancel_rearming_delayed_work(&ap->port_task);

      if (ata_msg_ctl(ap))
            ata_port_printk(ap, KERN_DEBUG, "%s: EXIT\n", __FUNCTION__);
}

static void ata_qc_complete_internal(struct ata_queued_cmd *qc)
{
      struct completion *waiting = qc->private_data;

      complete(waiting);
}

/**
 *    ata_exec_internal_sg - execute libata internal command
 *    @dev: Device to which the command is sent
 *    @tf: Taskfile registers for the command and the result
 *    @cdb: CDB for packet command
 *    @dma_dir: Data tranfer direction of the command
 *    @sgl: sg list for the data buffer of the command
 *    @n_elem: Number of sg entries
 *    @timeout: Timeout in msecs (0 for default)
 *
 *    Executes libata internal command with timeout.  @tf contains
 *    command on entry and result on return.  Timeout and error
 *    conditions are reported via return value.  No recovery action
 *    is taken after a command times out.  It's caller's duty to
 *    clean up after timeout.
 *
 *    LOCKING:
 *    None.  Should be called with kernel context, might sleep.
 *
 *    RETURNS:
 *    Zero on success, AC_ERR_* mask on failure
 */
unsigned ata_exec_internal_sg(struct ata_device *dev,
                        struct ata_taskfile *tf, const u8 *cdb,
                        int dma_dir, struct scatterlist *sgl,
                        unsigned int n_elem, unsigned long timeout)
{
      struct ata_link *link = dev->link;
      struct ata_port *ap = link->ap;
      u8 command = tf->command;
      struct ata_queued_cmd *qc;
      unsigned int tag, preempted_tag;
      u32 preempted_sactive, preempted_qc_active;
      int preempted_nr_active_links;
      DECLARE_COMPLETION_ONSTACK(wait);
      unsigned long flags;
      unsigned int err_mask;
      int rc;

      spin_lock_irqsave(ap->lock, flags);

      /* no internal command while frozen */
      if (ap->pflags & ATA_PFLAG_FROZEN) {
            spin_unlock_irqrestore(ap->lock, flags);
            return AC_ERR_SYSTEM;
      }

      /* initialize internal qc */

      /* XXX: Tag 0 is used for drivers with legacy EH as some
       * drivers choke if any other tag is given.  This breaks
       * ata_tag_internal() test for those drivers.  Don't use new
       * EH stuff without converting to it.
       */
      if (ap->ops->error_handler)
            tag = ATA_TAG_INTERNAL;
      else
            tag = 0;

      if (test_and_set_bit(tag, &ap->qc_allocated))
            BUG();
      qc = __ata_qc_from_tag(ap, tag);

      qc->tag = tag;
      qc->scsicmd = NULL;
      qc->ap = ap;
      qc->dev = dev;
      ata_qc_reinit(qc);

      preempted_tag = link->active_tag;
      preempted_sactive = link->sactive;
      preempted_qc_active = ap->qc_active;
      preempted_nr_active_links = ap->nr_active_links;
      link->active_tag = ATA_TAG_POISON;
      link->sactive = 0;
      ap->qc_active = 0;
      ap->nr_active_links = 0;

      /* prepare & issue qc */
      qc->tf = *tf;
      if (cdb)
            memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
      qc->flags |= ATA_QCFLAG_RESULT_TF;
      qc->dma_dir = dma_dir;
      if (dma_dir != DMA_NONE) {
            unsigned int i, buflen = 0;
            struct scatterlist *sg;

            for_each_sg(sgl, sg, n_elem, i)
                  buflen += sg->length;

            ata_sg_init(qc, sgl, n_elem);
            qc->nbytes = buflen;
      }

      qc->private_data = &wait;
      qc->complete_fn = ata_qc_complete_internal;

      ata_qc_issue(qc);

      spin_unlock_irqrestore(ap->lock, flags);

      if (!timeout)
            timeout = ata_probe_timeout * 1000 / HZ;

      rc = wait_for_completion_timeout(&wait, msecs_to_jiffies(timeout));

      ata_port_flush_task(ap);

      if (!rc) {
            spin_lock_irqsave(ap->lock, flags);

            /* We're racing with irq here.  If we lose, the
             * following test prevents us from completing the qc
             * twice.  If we win, the port is frozen and will be
             * cleaned up by ->post_internal_cmd().
             */
            if (qc->flags & ATA_QCFLAG_ACTIVE) {
                  qc->err_mask |= AC_ERR_TIMEOUT;

                  if (ap->ops->error_handler)
                        ata_port_freeze(ap);
                  else
                        ata_qc_complete(qc);

                  if (ata_msg_warn(ap))
                        ata_dev_printk(dev, KERN_WARNING,
                              "qc timeout (cmd 0x%x)\n", command);
            }

            spin_unlock_irqrestore(ap->lock, flags);
      }

      /* do post_internal_cmd */
      if (ap->ops->post_internal_cmd)
            ap->ops->post_internal_cmd(qc);

      /* perform minimal error analysis */
      if (qc->flags & ATA_QCFLAG_FAILED) {
            if (qc->result_tf.command & (ATA_ERR | ATA_DF))
                  qc->err_mask |= AC_ERR_DEV;

            if (!qc->err_mask)
                  qc->err_mask |= AC_ERR_OTHER;

            if (qc->err_mask & ~AC_ERR_OTHER)
                  qc->err_mask &= ~AC_ERR_OTHER;
      }

      /* finish up */
      spin_lock_irqsave(ap->lock, flags);

      *tf = qc->result_tf;
      err_mask = qc->err_mask;

      ata_qc_free(qc);
      link->active_tag = preempted_tag;
      link->sactive = preempted_sactive;
      ap->qc_active = preempted_qc_active;
      ap->nr_active_links = preempted_nr_active_links;

      /* XXX - Some LLDDs (sata_mv) disable port on command failure.
       * Until those drivers are fixed, we detect the condition
       * here, fail the command with AC_ERR_SYSTEM and reenable the
       * port.
       *
       * Note that this doesn't change any behavior as internal
       * command failure results in disabling the device in the
       * higher layer for LLDDs without new reset/EH callbacks.
       *
       * Kill the following code as soon as those drivers are fixed.
       */
      if (ap->flags & ATA_FLAG_DISABLED) {
            err_mask |= AC_ERR_SYSTEM;
            ata_port_probe(ap);
      }

      spin_unlock_irqrestore(ap->lock, flags);

      return err_mask;
}

/**
 *    ata_exec_internal - execute libata internal command
 *    @dev: Device to which the command is sent
 *    @tf: Taskfile registers for the command and the result
 *    @cdb: CDB for packet command
 *    @dma_dir: Data tranfer direction of the command
 *    @buf: Data buffer of the command
 *    @buflen: Length of data buffer
 *    @timeout: Timeout in msecs (0 for default)
 *
 *    Wrapper around ata_exec_internal_sg() which takes simple
 *    buffer instead of sg list.
 *
 *    LOCKING:
 *    None.  Should be called with kernel context, might sleep.
 *
 *    RETURNS:
 *    Zero on success, AC_ERR_* mask on failure
 */
unsigned ata_exec_internal(struct ata_device *dev,
                     struct ata_taskfile *tf, const u8 *cdb,
                     int dma_dir, void *buf, unsigned int buflen,
                     unsigned long timeout)
{
      struct scatterlist *psg = NULL, sg;
      unsigned int n_elem = 0;

      if (dma_dir != DMA_NONE) {
            WARN_ON(!buf);
            sg_init_one(&sg, buf, buflen);
            psg = &sg;
            n_elem++;
      }

      return ata_exec_internal_sg(dev, tf, cdb, dma_dir, psg, n_elem,
                            timeout);
}

/**
 *    ata_do_simple_cmd - execute simple internal command
 *    @dev: Device to which the command is sent
 *    @cmd: Opcode to execute
 *
 *    Execute a 'simple' command, that only consists of the opcode
 *    'cmd' itself, without filling any other registers
 *
 *    LOCKING:
 *    Kernel thread context (may sleep).
 *
 *    RETURNS:
 *    Zero on success, AC_ERR_* mask on failure
 */
unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd)
{
      struct ata_taskfile tf;

      ata_tf_init(dev, &tf);

      tf.command = cmd;
      tf.flags |= ATA_TFLAG_DEVICE;
      tf.protocol = ATA_PROT_NODATA;

      return ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
}

/**
 *    ata_pio_need_iordy      -     check if iordy needed
 *    @adev: ATA device
 *
 *    Check if the current speed of the device requires IORDY. Used
 *    by various controllers for chip configuration.
 */

unsigned int ata_pio_need_iordy(const struct ata_device *adev)
{
      /* Controller doesn't support  IORDY. Probably a pointless check
         as the caller should know this */
      if (adev->link->ap->flags & ATA_FLAG_NO_IORDY)
            return 0;
      /* PIO3 and higher it is mandatory */
      if (adev->pio_mode > XFER_PIO_2)
            return 1;
      /* We turn it on when possible */
      if (ata_id_has_iordy(adev->id))
            return 1;
      return 0;
}

/**
 *    ata_pio_mask_no_iordy   -     Return the non IORDY mask
 *    @adev: ATA device
 *
 *    Compute the highest mode possible if we are not using iordy. Return
 *    -1 if no iordy mode is available.
 */

static u32 ata_pio_mask_no_iordy(const struct ata_device *adev)
{
      /* If we have no drive specific rule, then PIO 2 is non IORDY */
      if (adev->id[ATA_ID_FIELD_VALID] & 2) {   /* EIDE */
            u16 pio = adev->id[ATA_ID_EIDE_PIO];
            /* Is the speed faster than the drive allows non IORDY ? */
            if (pio) {
                  /* This is cycle times not frequency - watch the logic! */
                  if (pio > 240)    /* PIO2 is 240nS per cycle */
                        return 3 << ATA_SHIFT_PIO;
                  return 7 << ATA_SHIFT_PIO;
            }
      }
      return 3 << ATA_SHIFT_PIO;
}

/**
 *    ata_dev_read_id - Read ID data from the specified device
 *    @dev: target device
 *    @p_class: pointer to class of the target device (may be changed)
 *    @flags: ATA_READID_* flags
 *    @id: buffer to read IDENTIFY data into
 *
 *    Read ID data from the specified device.  ATA_CMD_ID_ATA is
 *    performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
 *    devices.  This function also issues ATA_CMD_INIT_DEV_PARAMS
 *    for pre-ATA4 drives.
 *
 *    FIXME: ATA_CMD_ID_ATA is optional for early drives and right
 *    now we abort if we hit that case.
 *
 *    LOCKING:
 *    Kernel thread context (may sleep)
 *
 *    RETURNS:
 *    0 on success, -errno otherwise.
 */
int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class,
                unsigned int flags, u16 *id)
{
      struct ata_port *ap = dev->link->ap;
      unsigned int class = *p_class;
      struct ata_taskfile tf;
      unsigned int err_mask = 0;
      const char *reason;
      int may_fallback = 1, tried_spinup = 0;
      int rc;

      if (ata_msg_ctl(ap))
            ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER\n", __FUNCTION__);

      ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
 retry:
      ata_tf_init(dev, &tf);

      switch (class) {
      case ATA_DEV_ATA:
            tf.command = ATA_CMD_ID_ATA;
            break;
      case ATA_DEV_ATAPI:
            tf.command = ATA_CMD_ID_ATAPI;
            break;
      default:
            rc = -ENODEV;
            reason = "unsupported class";
            goto err_out;
      }

      tf.protocol = ATA_PROT_PIO;

      /* Some devices choke if TF registers contain garbage.  Make
       * sure those are properly initialized.
       */
      tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;

      /* Device presence detection is unreliable on some
       * controllers.  Always poll IDENTIFY if available.
       */
      tf.flags |= ATA_TFLAG_POLLING;

      err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE,
                             id, sizeof(id[0]) * ATA_ID_WORDS, 0);
      if (err_mask) {
            if (err_mask & AC_ERR_NODEV_HINT) {
                  DPRINTK("ata%u.%d: NODEV after polling detection\n",
                        ap->print_id, dev->devno);
                  return -ENOENT;
            }

            /* Device or controller might have reported the wrong
             * device class.  Give a shot at the other IDENTIFY if
             * the current one is aborted by the device.
             */
            if (may_fallback &&
                (err_mask == AC_ERR_DEV) && (tf.feature & ATA_ABORTED)) {
                  may_fallback = 0;

                  if (class == ATA_DEV_ATA)
                        class = ATA_DEV_ATAPI;
                  else
                        class = ATA_DEV_ATA;
                  goto retry;
            }

            rc = -EIO;
            reason = "I/O error";
            goto err_out;
      }

      /* Falling back doesn't make sense if ID data was read
       * successfully at least once.
       */
      may_fallback = 0;

      swap_buf_le16(id, ATA_ID_WORDS);

      /* sanity check */
      rc = -EINVAL;
      reason = "device reports invalid type";

      if (class == ATA_DEV_ATA) {
            if (!ata_id_is_ata(id) && !ata_id_is_cfa(id))
                  goto err_out;
      } else {
            if (ata_id_is_ata(id))
                  goto err_out;
      }

      if (!tried_spinup && (id[2] == 0x37c8 || id[2] == 0x738c)) {
            tried_spinup = 1;
            /*
             * Drive powered-up in standby mode, and requires a specific
             * SET_FEATURES spin-up subcommand before it will accept
             * anything other than the original IDENTIFY command.
             */
            err_mask = ata_dev_set_feature(dev, SETFEATURES_SPINUP, 0);
            if (err_mask && id[2] != 0x738c) {
                  rc = -EIO;
                  reason = "SPINUP failed";
                  goto err_out;
            }
            /*
             * If the drive initially returned incomplete IDENTIFY info,
             * we now must reissue the IDENTIFY command.
             */
            if (id[2] == 0x37c8)
                  goto retry;
      }

      if ((flags & ATA_READID_POSTRESET) && class == ATA_DEV_ATA) {
            /*
             * The exact sequence expected by certain pre-ATA4 drives is:
             * SRST RESET
             * IDENTIFY (optional in early ATA)
             * INITIALIZE DEVICE PARAMETERS (later IDE and ATA)
             * anything else..
             * Some drives were very specific about that exact sequence.
             *
             * Note that ATA4 says lba is mandatory so the second check
             * shoud never trigger.
             */
            if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
                  err_mask = ata_dev_init_params(dev, id[3], id[6]);
                  if (err_mask) {
                        rc = -EIO;
                        reason = "INIT_DEV_PARAMS failed";
                        goto err_out;
                  }

                  /* current CHS translation info (id[53-58]) might be
                   * changed. reread the identify device info.
                   */
                  flags &= ~ATA_READID_POSTRESET;
                  goto retry;
            }
      }

      *p_class = class;

      return 0;

 err_out:
      if (ata_msg_warn(ap))
            ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY "
                         "(%s, err_mask=0x%x)\n", reason, err_mask);
      return rc;
}

static inline u8 ata_dev_knobble(struct ata_device *dev)
{
      struct ata_port *ap = dev->link->ap;
      return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
}

static void ata_dev_config_ncq(struct ata_device *dev,
                         char *desc, size_t desc_sz)
{
      struct ata_port *ap = dev->link->ap;
      int hdepth = 0, ddepth = ata_id_queue_depth(dev->id);

      if (!ata_id_has_ncq(dev->id)) {
            desc[0] = '\0';
            return;
      }
      if (dev->horkage & ATA_HORKAGE_NONCQ) {
            snprintf(desc, desc_sz, "NCQ (not used)");
            return;
      }
      if (ap->flags & ATA_FLAG_NCQ) {
            hdepth = min(ap->scsi_host->can_queue, ATA_MAX_QUEUE - 1);
            dev->flags |= ATA_DFLAG_NCQ;
      }

      if (hdepth >= ddepth)
            snprintf(desc, desc_sz, "NCQ (depth %d)", ddepth);
      else
            snprintf(desc, desc_sz, "NCQ (depth %d/%d)", hdepth, ddepth);
}

/**
 *    ata_dev_configure - Configure the specified ATA/ATAPI device
 *    @dev: Target device to configure
 *
 *    Configure @dev according to @dev->id.  Generic and low-level
 *    driver specific fixups are also applied.
 *
 *    LOCKING:
 *    Kernel thread context (may sleep)
 *
 *    RETURNS:
 *    0 on success, -errno otherwise
 */
int ata_dev_configure(struct ata_device *dev)
{
      struct ata_port *ap = dev->link->ap;
      struct ata_eh_context *ehc = &dev->link->eh_context;
      int print_info = ehc->i.flags & ATA_EHI_PRINTINFO;
      const u16 *id = dev->id;
      unsigned int xfer_mask;
      char revbuf[7];         /* XYZ-99\0 */
      char fwrevbuf[ATA_ID_FW_REV_LEN+1];
      char modelbuf[ATA_ID_PROD_LEN+1];
      int rc;

      if (!ata_dev_enabled(dev) && ata_msg_info(ap)) {
            ata_dev_printk(dev, KERN_INFO, "%s: ENTER/EXIT -- nodev\n",
                         __FUNCTION__);
            return 0;
      }

      if (ata_msg_probe(ap))
            ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER\n", __FUNCTION__);

      /* set horkage */
      dev->horkage |= ata_dev_blacklisted(dev);

      /* let ACPI work its magic */
      rc = ata_acpi_on_devcfg(dev);
      if (rc)
            return rc;

      /* massage HPA, do it early as it might change IDENTIFY data */
      rc = ata_hpa_resize(dev);
      if (rc)
            return rc;

      /* print device capabilities */
      if (ata_msg_probe(ap))
            ata_dev_printk(dev, KERN_DEBUG,
                         "%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x "
                         "85:%04x 86:%04x 87:%04x 88:%04x\n",
                         __FUNCTION__,
                         id[49], id[82], id[83], id[84],
                         id[85], id[86], id[87], id[88]);

      /* initialize to-be-configured parameters */
      dev->flags &= ~ATA_DFLAG_CFG_MASK;
      dev->max_sectors = 0;
      dev->cdb_len = 0;
      dev->n_sectors = 0;
      dev->cylinders = 0;
      dev->heads = 0;
      dev->sectors = 0;

      /*
       * common ATA, ATAPI feature tests
       */

      /* find max transfer mode; for printk only */
      xfer_mask = ata_id_xfermask(id);

      if (ata_msg_probe(ap))
            ata_dump_id(id);

      /* SCSI only uses 4-char revisions, dump full 8 chars from ATA */
      ata_id_c_string(dev->id, fwrevbuf, ATA_ID_FW_REV,
                  sizeof(fwrevbuf));

      ata_id_c_string(dev->id, modelbuf, ATA_ID_PROD,
                  sizeof(modelbuf));

      /* ATA-specific feature tests */
      if (dev->class == ATA_DEV_ATA) {
            if (ata_id_is_cfa(id)) {
                  if (id[162] & 1) /* CPRM may make this media unusable */
                        ata_dev_printk(dev, KERN_WARNING,
                                     "supports DRM functions and may "
                                     "not be fully accessable.\n");
                  snprintf(revbuf, 7, "CFA");
            } else
                  snprintf(revbuf, 7, "ATA-%d", ata_id_major_version(id));

            dev->n_sectors = ata_id_n_sectors(id);

            if (dev->id[59] & 0x100)
                  dev->multi_count = dev->id[59] & 0xff;

            if (ata_id_has_lba(id)) {
                  const char *lba_desc;
                  char ncq_desc[20];

                  lba_desc = "LBA";
                  dev->flags |= ATA_DFLAG_LBA;
                  if (ata_id_has_lba48(id)) {
                        dev->flags |= ATA_DFLAG_LBA48;
                        lba_desc = "LBA48";

                        if (dev->n_sectors >= (1UL << 28) &&
                            ata_id_has_flush_ext(id))
                              dev->flags |= ATA_DFLAG_FLUSH_EXT;
                  }

                  /* config NCQ */
                  ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc));

                  /* print device info to dmesg */
                  if (ata_msg_drv(ap) && print_info) {
                        ata_dev_printk(dev, KERN_INFO,
                              "%s: %s, %s, max %s\n",
                              revbuf, modelbuf, fwrevbuf,
                              ata_mode_string(xfer_mask));
                        ata_dev_printk(dev, KERN_INFO,
                              "%Lu sectors, multi %u: %s %s\n",
                              (unsigned long long)dev->n_sectors,
                              dev->multi_count, lba_desc, ncq_desc);
                  }
            } else {
                  /* CHS */

                  /* Default translation */
                  dev->cylinders    = id[1];
                  dev->heads  = id[3];
                  dev->sectors      = id[6];

                  if (ata_id_current_chs_valid(id)) {
                        /* Current CHS translation is valid. */
                        dev->cylinders = id[54];
                        dev->heads     = id[55];
                        dev->sectors   = id[56];
                  }

                  /* print device info to dmesg */
                  if (ata_msg_drv(ap) && print_info) {
                        ata_dev_printk(dev, KERN_INFO,
                              "%s: %s, %s, max %s\n",
                              revbuf,     modelbuf, fwrevbuf,
                              ata_mode_string(xfer_mask));
                        ata_dev_printk(dev, KERN_INFO,
                              "%Lu sectors, multi %u, CHS %u/%u/%u\n",
                              (unsigned long long)dev->n_sectors,
                              dev->multi_count, dev->cylinders,
                              dev->heads, dev->sectors);
                  }
            }

            dev->cdb_len = 16;
      }

      /* ATAPI-specific feature tests */
      else if (dev->class == ATA_DEV_ATAPI) {
            const char *cdb_intr_string = "";
            const char *atapi_an_string = "";
            u32 sntf;

            rc = atapi_cdb_len(id);
            if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
                  if (ata_msg_warn(ap))
                        ata_dev_printk(dev, KERN_WARNING,
                                     "unsupported CDB len\n");
                  rc = -EINVAL;
                  goto err_out_nosup;
            }
            dev->cdb_len = (unsigned int) rc;

            /* Enable ATAPI AN if both the host and device have
             * the support.  If PMP is attached, SNTF is required
             * to enable ATAPI AN to discern between PHY status
             * changed notifications and ATAPI ANs.
             */
            if ((ap->flags & ATA_FLAG_AN) && ata_id_has_atapi_AN(id) &&
                (!ap->nr_pmp_links ||
                 sata_scr_read(&ap->link, SCR_NOTIFICATION, &sntf) == 0)) {
                  unsigned int err_mask;

                  /* issue SET feature command to turn this on */
                  err_mask = ata_dev_set_feature(dev,
                              SETFEATURES_SATA_ENABLE, SATA_AN);
                  if (err_mask)
                        ata_dev_printk(dev, KERN_ERR,
                              "failed to enable ATAPI AN "
                              "(err_mask=0x%x)\n", err_mask);
                  else {
                        dev->flags |= ATA_DFLAG_AN;
                        atapi_an_string = ", ATAPI AN";
                  }
            }

            if (ata_id_cdb_intr(dev->id)) {
                  dev->flags |= ATA_DFLAG_CDB_INTR;
                  cdb_intr_string = ", CDB intr";
            }

            /* print device info to dmesg */
            if (ata_msg_drv(ap) && print_info)
                  ata_dev_printk(dev, KERN_INFO,
                               "ATAPI: %s, %s, max %s%s%s\n",
                               modelbuf, fwrevbuf,
                               ata_mode_string(xfer_mask),
                               cdb_intr_string, atapi_an_string);
      }

      /* determine max_sectors */
      dev->max_sectors = ATA_MAX_SECTORS;
      if (dev->flags & ATA_DFLAG_LBA48)
            dev->max_sectors = ATA_MAX_SECTORS_LBA48;

      if (!(dev->horkage & ATA_HORKAGE_IPM)) {
            if (ata_id_has_hipm(dev->id))
                  dev->flags |= ATA_DFLAG_HIPM;
            if (ata_id_has_dipm(dev->id))
                  dev->flags |= ATA_DFLAG_DIPM;
      }

      if (dev->horkage & ATA_HORKAGE_DIAGNOSTIC) {
            /* Let the user know. We don't want to disallow opens for
               rescue purposes, or in case the vendor is just a blithering
               idiot */
            if (print_info) {
                  ata_dev_printk(dev, KERN_WARNING,
"Drive reports diagnostics failure. This may indicate a drive\n");
                  ata_dev_printk(dev, KERN_WARNING,
"fault or invalid emulation. Contact drive vendor for information.\n");
            }
      }

      /* limit bridge transfers to udma5, 200 sectors */
      if (ata_dev_knobble(dev)) {
            if (ata_msg_drv(ap) && print_info)
                  ata_dev_printk(dev, KERN_INFO,
                               "applying bridge limits\n");
            dev->udma_mask &= ATA_UDMA5;
            dev->max_sectors = ATA_MAX_SECTORS;
      }

      if ((dev->class == ATA_DEV_ATAPI) &&
          (atapi_command_packet_set(id) == TYPE_TAPE)) {
            dev->max_sectors = ATA_MAX_SECTORS_TAPE;
            dev->horkage |= ATA_HORKAGE_STUCK_ERR;
      }

      if (dev->horkage & ATA_HORKAGE_MAX_SEC_128)
            dev->max_sectors = min_t(unsigned int, ATA_MAX_SECTORS_128,
                               dev->max_sectors);

      if (ata_dev_blacklisted(dev) & ATA_HORKAGE_IPM) {
            dev->horkage |= ATA_HORKAGE_IPM;

            /* reset link pm_policy for this port to no pm */
            ap->pm_policy = MAX_PERFORMANCE;
      }

      if (ap->ops->dev_config)
            ap->ops->dev_config(dev);

      if (ata_msg_probe(ap))
            ata_dev_printk(dev, KERN_DEBUG, "%s: EXIT, drv_stat = 0x%x\n",
                  __FUNCTION__, ata_chk_status(ap));
      return 0;

err_out_nosup:
      if (ata_msg_probe(ap))
            ata_dev_printk(dev, KERN_DEBUG,
                         "%s: EXIT, err\n", __FUNCTION__);
      return rc;
}

/**
 *    ata_cable_40wire  -     return 40 wire cable type
 *    @ap: port
 *
 *    Helper method for drivers which want to hardwire 40 wire cable
 *    detection.
 */

int ata_cable_40wire(struct ata_port *ap)
{
      return ATA_CBL_PATA40;
}

/**
 *    ata_cable_80wire  -     return 80 wire cable type
 *    @ap: port
 *
 *    Helper method for drivers which want to hardwire 80 wire cable
 *    detection.
 */

int ata_cable_80wire(struct ata_port *ap)
{
      return ATA_CBL_PATA80;
}

/**
 *    ata_cable_unknown -     return unknown PATA cable.
 *    @ap: port
 *
 *    Helper method for drivers which have no PATA cable detection.
 */

int ata_cable_unknown(struct ata_port *ap)
{
      return ATA_CBL_PATA_UNK;
}

/**
 *    ata_cable_sata    -     return SATA cable type
 *    @ap: port
 *
 *    Helper method for drivers which have SATA cables
 */

int ata_cable_sata(struct ata_port *ap)
{
      return ATA_CBL_SATA;
}

/**
 *    ata_bus_probe - Reset and probe ATA bus
 *    @ap: Bus to probe
 *
 *    Master ATA bus probing function.  Initiates a hardware-dependent
 *    bus reset, then attempts to identify any devices found on
 *    the bus.
 *
 *    LOCKING:
 *    PCI/etc. bus probe sem.
 *
 *    RETURNS:
 *    Zero on success, negative errno otherwise.
 */

int ata_bus_probe(struct ata_port *ap)
{
      unsigned int classes[ATA_MAX_DEVICES];
      int tries[ATA_MAX_DEVICES];
      int rc;
      struct ata_device *dev;

      ata_port_probe(ap);

      ata_link_for_each_dev(dev, &ap->link)
            tries[dev->devno] = ATA_PROBE_MAX_TRIES;

 retry:
      ata_link_for_each_dev(dev, &ap->link) {
            /* If we issue an SRST then an ATA drive (not ATAPI)
             * may change configuration and be in PIO0 timing. If
             * we do a hard reset (or are coming from power on)
             * this is true for ATA or ATAPI. Until we've set a
             * suitable controller mode we should not touch the
             * bus as we may be talking too fast.
             */
            dev->pio_mode = XFER_PIO_0;

            /* If the controller has a pio mode setup function
             * then use it to set the chipset to rights. Don't
             * touch the DMA setup as that will be dealt with when
             * configuring devices.
             */
            if (ap->ops->set_piomode)
                  ap->ops->set_piomode(ap, dev);
      }

      /* reset and determine device classes */
      ap->ops->phy_reset(ap);

      ata_link_for_each_dev(dev, &ap->link) {
            if (!(ap->flags & ATA_FLAG_DISABLED) &&
                dev->class != ATA_DEV_UNKNOWN)
                  classes[dev->devno] = dev->class;
            else
                  classes[dev->devno] = ATA_DEV_NONE;

            dev->class = ATA_DEV_UNKNOWN;
      }

      ata_port_probe(ap);

      /* read IDENTIFY page and configure devices. We have to do the identify
         specific sequence bass-ackwards so that PDIAG- is released by
         the slave device */

      ata_link_for_each_dev(dev, &ap->link) {
            if (tries[dev->devno])
                  dev->class = classes[dev->devno];

            if (!ata_dev_enabled(dev))
                  continue;

            rc = ata_dev_read_id(dev, &dev->class, ATA_READID_POSTRESET,
                             dev->id);
            if (rc)
                  goto fail;
      }

      /* Now ask for the cable type as PDIAG- should have been released */
      if (ap->ops->cable_detect)
            ap->cbl = ap->ops->cable_detect(ap);

      /* We may have SATA bridge glue hiding here irrespective of the
         reported cable types and sensed types */
      ata_link_for_each_dev(dev, &ap->link) {
            if (!ata_dev_enabled(dev))
                  continue;
            /* SATA drives indicate we have a bridge. We don't know which
               end of the link the bridge is which is a problem */
            if (ata_id_is_sata(dev->id))
                  ap->cbl = ATA_CBL_SATA;
      }

      /* After the identify sequence we can now set up the devices. We do
         this in the normal order so that the user doesn't get confused */

      ata_link_for_each_dev(dev, &ap->link) {
            if (!ata_dev_enabled(dev))
                  continue;

            ap->link.eh_context.i.flags |= ATA_EHI_PRINTINFO;
            rc = ata_dev_configure(dev);
            ap->link.eh_context.i.flags &= ~ATA_EHI_PRINTINFO;
            if (rc)
                  goto fail;
      }

      /* configure transfer mode */
      rc = ata_set_mode(&ap->link, &dev);
      if (rc)
            goto fail;

      ata_link_for_each_dev(dev, &ap->link)
            if (ata_dev_enabled(dev))
                  return 0;

      /* no device present, disable port */
      ata_port_disable(ap);
      return -ENODEV;

 fail:
      tries[dev->devno]--;

      switch (rc) {
      case -EINVAL:
            /* eeek, something went very wrong, give up */
            tries[dev->devno] = 0;
            break;

      case -ENODEV:
            /* give it just one more chance */
            tries[dev->devno] = min(tries[dev->devno], 1);
      case -EIO:
            if (tries[dev->devno] == 1) {
                  /* This is the last chance, better to slow
                   * down than lose it.
                   */
                  sata_down_spd_limit(&ap->link);
                  ata_down_xfermask_limit(dev, ATA_DNXFER_PIO);
            }
      }

      if (!tries[dev->devno])
            ata_dev_disable(dev);

      goto retry;
}

/**
 *    ata_port_probe - Mark port as enabled
 *    @ap: Port for which we indicate enablement
 *
 *    Modify @ap data structure such that the system
 *    thinks that the entire port is enabled.
 *
 *    LOCKING: host lock, or some other form of
 *    serialization.
 */

void ata_port_probe(struct ata_port *ap)
{
      ap->flags &= ~ATA_FLAG_DISABLED;
}

/**
 *    sata_print_link_status - Print SATA link status
 *    @link: SATA link to printk link status about
 *
 *    This function prints link speed and status of a SATA link.
 *
 *    LOCKING:
 *    None.
 */
void sata_print_link_status(struct ata_link *link)
{
      u32 sstatus, scontrol, tmp;

      if (sata_scr_read(link, SCR_STATUS, &sstatus))
            return;
      sata_scr_read(link, SCR_CONTROL, &scontrol);

      if (ata_link_online(link)) {
            tmp = (sstatus >> 4) & 0xf;
            ata_link_printk(link, KERN_INFO,
                        "SATA link up %s (SStatus %X SControl %X)\n",
                        sata_spd_string(tmp), sstatus, scontrol);
      } else {
            ata_link_printk(link, KERN_INFO,
                        "SATA link down (SStatus %X SControl %X)\n",
                        sstatus, scontrol);
      }
}

/**
 *    ata_dev_pair            -     return other device on cable
 *    @adev: device
 *
 *    Obtain the other device on the same cable, or if none is
 *    present NULL is returned
 */

struct ata_device *ata_dev_pair(struct ata_device *adev)
{
      struct ata_link *link = adev->link;
      struct ata_device *pair = &link->device[1 - adev->devno];
      if (!ata_dev_enabled(pair))
            return NULL;
      return pair;
}

/**
 *    ata_port_disable - Disable port.
 *    @ap: Port to be disabled.
 *
 *    Modify @ap data structure such that the system
 *    thinks that the entire port is disabled, and should
 *    never attempt to probe or communicate with devices
 *    on this port.
 *
 *    LOCKING: host lock, or some other form of
 *    serialization.
 */

void ata_port_disable(struct ata_port *ap)
{
      ap->link.device[0].class = ATA_DEV_NONE;
      ap->link.device[1].class = ATA_DEV_NONE;
      ap->flags |= ATA_FLAG_DISABLED;
}

/**
 *    sata_down_spd_limit - adjust SATA spd limit downward
 *    @link: Link to adjust SATA spd limit for
 *
 *    Adjust SATA spd limit of @link downward.  Note that this
 *    function only adjusts the limit.  The change must be applied
 *    using sata_set_spd().
 *
 *    LOCKING:
 *    Inherited from caller.
 *
 *    RETURNS:
 *    0 on success, negative errno on failure
 */
int sata_down_spd_limit(struct ata_link *link)
{
      u32 sstatus, spd, mask;
      int rc, highbit;

      if (!sata_scr_valid(link))
            return -EOPNOTSUPP;

      /* If SCR can be read, use it to determine the current SPD.
       * If not, use cached value in link->sata_spd.
       */
      rc = sata_scr_read(link, SCR_STATUS, &sstatus);
      if (rc == 0)
            spd = (sstatus >> 4) & 0xf;
      else
            spd = link->sata_spd;

      mask = link->sata_spd_limit;
      if (mask <= 1)
            return -EINVAL;

      /* unconditionally mask off the highest bit */
      highbit = fls(mask) - 1;
      mask &= ~(1 << highbit);

      /* Mask off all speeds higher than or equal to the current
       * one.  Force 1.5Gbps if current SPD is not available.
       */
      if (spd > 1)
            mask &= (1 << (spd - 1)) - 1;
      else
            mask &= 1;

      /* were we already at the bottom? */
      if (!mask)
            return -EINVAL;

      link->sata_spd_limit = mask;

      ata_link_printk(link, KERN_WARNING, "limiting SATA link speed to %s\n",
                  sata_spd_string(fls(mask)));

      return 0;
}

static int __sata_set_spd_needed(struct ata_link *link, u32 *scontrol)
{
      struct ata_link *host_link = &link->ap->link;
      u32 limit, target, spd;

      limit = link->sata_spd_limit;

      /* Don't configure downstream link faster than upstream link.
       * It doesn't speed up anything and some PMPs choke on such
       * configuration.
       */
      if (!ata_is_host_link(link) && host_link->sata_spd)
            limit &= (1 << host_link->sata_spd) - 1;

      if (limit == UINT_MAX)
            target = 0;
      else
            target = fls(limit);

      spd = (*scontrol >> 4) & 0xf;
      *scontrol = (*scontrol & ~0xf0) | ((target & 0xf) << 4);

      return spd != target;
}

/**
 *    sata_set_spd_needed - is SATA spd configuration needed
 *    @link: Link in question
 *
 *    Test whether the spd limit in SControl matches
 *    @link->sata_spd_limit.  This function is used to determine
 *    whether hardreset is necessary to apply SATA spd
 *    configuration.
 *
 *    LOCKING:
 *    Inherited from caller.
 *
 *    RETURNS:
 *    1 if SATA spd configuration is needed, 0 otherwise.
 */
int sata_set_spd_needed(struct ata_link *link)
{
      u32 scontrol;

      if (sata_scr_read(link, SCR_CONTROL, &scontrol))
            return 1;

      return __sata_set_spd_needed(link, &scontrol);
}

/**
 *    sata_set_spd - set SATA spd according to spd limit
 *    @link: Link to set SATA spd for
 *
 *    Set SATA spd of @link according to sata_spd_limit.
 *
 *    LOCKING:
 *    Inherited from caller.
 *
 *    RETURNS:
 *    0 if spd doesn't need to be changed, 1 if spd has been
 *    changed.  Negative errno if SCR registers are inaccessible.
 */
int sata_set_spd(struct ata_link *link)
{
      u32 scontrol;
      int rc;

      if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
            return rc;

      if (!__sata_set_spd_needed(link, &scontrol))
            return 0;

      if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
            return rc;

      return 1;
}

/*
 * This mode timing computation functionality is ported over from
 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
 */
/*
 * PIO 0-4, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
 * for UDMA6, which is currently supported only by Maxtor drives.
 *
 * For PIO 5/6 MWDMA 3/4 see the CFA specification 3.0.
 */

static const struct ata_timing ata_timing[] = {

      { XFER_UDMA_6,     0,   0,   0,   0,   0,   0,   0,  15 },
      { XFER_UDMA_5,     0,   0,   0,   0,   0,   0,   0,  20 },
      { XFER_UDMA_4,     0,   0,   0,   0,   0,   0,   0,  30 },
      { XFER_UDMA_3,     0,   0,   0,   0,   0,   0,   0,  45 },

      { XFER_MW_DMA_4,  25,   0,   0,   0,  55,  20,  80,   0 },
      { XFER_MW_DMA_3,  25,   0,   0,   0,  65,  25, 100,   0 },
      { XFER_UDMA_2,     0,   0,   0,   0,   0,   0,   0,  60 },
      { XFER_UDMA_1,     0,   0,   0,   0,   0,   0,   0,  80 },
      { XFER_UDMA_0,     0,   0,   0,   0,   0,   0,   0, 120 },

/*    { XFER_UDMA_SLOW,  0,   0,   0,   0,   0,   0,   0, 150 }, */

      { XFER_MW_DMA_2,  25,   0,   0,   0,  70,  25, 120,   0 },
      { XFER_MW_DMA_1,  45,   0,   0,   0,  80,  50, 150,   0 },
      { XFER_MW_DMA_0,  60,   0,   0,   0, 215, 215, 480,   0 },

      { XFER_SW_DMA_2,  60,   0,   0,   0, 120, 120, 240,   0 },
      { XFER_SW_DMA_1,  90,   0,   0,   0, 240, 240, 480,   0 },
      { XFER_SW_DMA_0, 120,   0,   0,   0, 480, 480, 960,   0 },

      { XFER_PIO_6,     10,  55,  20,  80,  55,  20,  80,   0 },
      { XFER_PIO_5,     15,  65,  25, 100,  65,  25, 100,   0 },
      { XFER_PIO_4,     25,  70,  25, 120,  70,  25, 120,   0 },
      { XFER_PIO_3,     30,  80,  70, 180,  80,  70, 180,   0 },

      { XFER_PIO_2,     30, 290,  40, 330, 100,  90, 240,   0 },
      { XFER_PIO_1,     50, 290,  93, 383, 125, 100, 383,   0 },
      { XFER_PIO_0,     70, 290, 240, 600, 165, 150, 600,   0 },

/*    { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960,   0 }, */

      { 0xFF }
};

#define ENOUGH(v, unit)       (((v)-1)/(unit)+1)
#define EZ(v, unit)           ((v)?ENOUGH(v, unit):0)

static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
{
      q->setup   = EZ(t->setup   * 1000,  T);
      q->act8b   = EZ(t->act8b   * 1000,  T);
      q->rec8b   = EZ(t->rec8b   * 1000,  T);
      q->cyc8b   = EZ(t->cyc8b   * 1000,  T);
      q->active  = EZ(t->active  * 1000,  T);
      q->recover = EZ(t->recover * 1000,  T);
      q->cycle   = EZ(t->cycle   * 1000,  T);
      q->udma    = EZ(t->udma    * 1000, UT);
}

void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
                  struct ata_timing *m, unsigned int what)
{
      if (what & ATA_TIMING_SETUP  ) m->setup   = max(a->setup,   b->setup);
      if (what & ATA_TIMING_ACT8B  ) m->act8b   = max(a->act8b,   b->act8b);
      if (what & ATA_TIMING_REC8B  ) m->rec8b   = max(a->rec8b,   b->rec8b);
      if (what & ATA_TIMING_CYC8B  ) m->cyc8b   = max(a->cyc8b,   b->cyc8b);
      if (what & ATA_TIMING_ACTIVE ) m->active  = max(a->active,  b->active);
      if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
      if (what & ATA_TIMING_CYCLE  ) m->cycle   = max(a->cycle,   b->cycle);
      if (what & ATA_TIMING_UDMA   ) m->udma    = max(a->udma,    b->udma);
}

static const struct ata_timing *ata_timing_find_mode(unsigned short speed)
{
      const struct ata_timing *t;

      for (t = ata_timing; t->mode != speed; t++)
            if (t->mode == 0xFF)
                  return NULL;
      return t;
}

int ata_timing_compute(struct ata_device *adev, unsigned short speed,
                   struct ata_timing *t, int T, int UT)
{
      const struct ata_timing *s;
      struct ata_timing p;

      /*
       * Find the mode.
       */

      if (!(s = ata_timing_find_mode(speed)))
            return -EINVAL;

      memcpy(t, s, sizeof(*s));

      /*
       * If the drive is an EIDE drive, it can tell us it needs extended
       * PIO/MW_DMA cycle timing.
       */

      if (adev->id[ATA_ID_FIELD_VALID] & 2) {   /* EIDE drive */
            memset(&p, 0, sizeof(p));
            if (speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
                  if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
                                  else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
            } else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
                  p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
            }
            ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
      }

      /*
       * Convert the timing to bus clock counts.
       */

      ata_timing_quantize(t, t, T, UT);

      /*
       * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
       * S.M.A.R.T * and some other commands. We have to ensure that the
       * DMA cycle timing is slower/equal than the fastest PIO timing.
       */

      if (speed > XFER_PIO_6) {
            ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
            ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
      }

      /*
       * Lengthen active & recovery time so that cycle time is correct.
       */

      if (t->act8b + t->rec8b < t->cyc8b) {
            t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
            t->rec8b = t->cyc8b - t->act8b;
      }

      if (t->active + t->recover < t->cycle) {
            t->active += (t->cycle - (t->active + t->recover)) / 2;
            t->recover = t->cycle - t->active;
      }

      /* In a few cases quantisation may produce enough errors to
         leave t->cycle too low for the sum of active and recovery
         if so we must correct this */
      if (t->active + t->recover > t->cycle)
            t->cycle = t->active + t->recover;

      return 0;
}

/**
 *    ata_down_xfermask_limit - adjust dev xfer masks downward
 *    @dev: Device to adjust xfer masks
 *    @sel: ATA_DNXFER_* selector
 *
 *    Adjust xfer masks of @dev downward.  Note that this function
 *    does not apply the change.  Invoking ata_set_mode() afterwards
 *    will apply the limit.
 *
 *    LOCKING:
 *    Inherited from caller.
 *
 *    RETURNS:
 *    0 on success, negative errno on failure
 */
int ata_down_xfermask_limit(struct ata_device *dev, unsigned int sel)
{
      char buf[32];
      unsigned int orig_mask, xfer_mask;
      unsigned int pio_mask, mwdma_mask, udma_mask;
      int quiet, highbit;

      quiet = !!(sel & ATA_DNXFER_QUIET);
      sel &= ~ATA_DNXFER_QUIET;

      xfer_mask = orig_mask = ata_pack_xfermask(dev->pio_mask,
                                      dev->mwdma_mask,
                                      dev->udma_mask);
      ata_unpack_xfermask(xfer_mask, &pio_mask, &mwdma_mask, &udma_mask);

      switch (sel) {
      case ATA_DNXFER_PIO:
            highbit = fls(pio_mask) - 1;
            pio_mask &= ~(1 << highbit);
            break;

      case ATA_DNXFER_DMA:
            if (udma_mask) {
                  highbit = fls(udma_mask) - 1;
                  udma_mask &= ~(1 << highbit);
                  if (!udma_mask)
                        return -ENOENT;
            } else if (mwdma_mask) {
                  highbit = fls(mwdma_mask) - 1;
                  mwdma_mask &= ~(1 << highbit);
                  if (!mwdma_mask)
                        return -ENOENT;
            }
            break;

      case ATA_DNXFER_40C:
            udma_mask &= ATA_UDMA_MASK_40C;
            break;

      case ATA_DNXFER_FORCE_PIO0:
            pio_mask &= 1;
      case ATA_DNXFER_FORCE_PIO:
            mwdma_mask = 0;
            udma_mask = 0;
            break;

      default:
            BUG();
      }

      xfer_mask &= ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);

      if (!(xfer_mask & ATA_MASK_PIO) || xfer_mask == orig_mask)
            return -ENOENT;

      if (!quiet) {
            if (xfer_mask & (ATA_MASK_MWDMA | ATA_MASK_UDMA))
                  snprintf(buf, sizeof(buf), "%s:%s",
                         ata_mode_string(xfer_mask),
                         ata_mode_string(xfer_mask & ATA_MASK_PIO));
            else
                  snprintf(buf, sizeof(buf), "%s",
                         ata_mode_string(xfer_mask));

            ata_dev_printk(dev, KERN_WARNING,
                         "limiting speed to %s\n", buf);
      }

      ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
                      &dev->udma_mask);

      return 0;
}

static int ata_dev_set_mode(struct ata_device *dev)
{
      struct ata_eh_context *ehc = &dev->link->eh_context;
      unsigned int err_mask;
      int rc;

      dev->flags &= ~ATA_DFLAG_PIO;
      if (dev->xfer_shift == ATA_SHIFT_PIO)
            dev->flags |= ATA_DFLAG_PIO;

      err_mask = ata_dev_set_xfermode(dev);

      /* Old CFA may refuse this command, which is just fine */
      if (dev->xfer_shift == ATA_SHIFT_PIO && ata_id_is_cfa(dev->id))
            err_mask &= ~AC_ERR_DEV;

      /* Some very old devices and some bad newer ones fail any kind of
         SET_XFERMODE request but support PIO0-2 timings and no IORDY */
      if (dev->xfer_shift == ATA_SHIFT_PIO && !ata_id_has_iordy(dev->id) &&
                  dev->pio_mode <= XFER_PIO_2)
            err_mask &= ~AC_ERR_DEV;

      /* Early MWDMA devices do DMA but don't allow DMA mode setting.
         Don't fail an MWDMA0 set IFF the device indicates it is in MWDMA0 */
      if (dev->xfer_shift == ATA_SHIFT_MWDMA && 
          dev->dma_mode == XFER_MW_DMA_0 &&
          (dev->id[63] >> 8) & 1)
            err_mask &= ~AC_ERR_DEV;

      if (err_mask) {
            ata_dev_printk(dev, KERN_ERR, "failed to set xfermode "
                         "(err_mask=0x%x)\n", err_mask);
            return -EIO;
      }

      ehc->i.flags |= ATA_EHI_POST_SETMODE;
      rc = ata_dev_revalidate(dev, ATA_DEV_UNKNOWN, 0);
      ehc->i.flags &= ~ATA_EHI_POST_SETMODE;
      if (rc)
            return rc;

      DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
            dev->xfer_shift, (int)dev->xfer_mode);

      ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
                   ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
      return 0;
}

/**
 *    ata_do_set_mode - Program timings and issue SET FEATURES - XFER
 *    @link: link on which timings will be programmed
 *    @r_failed_dev: out paramter for failed device
 *
 *    Standard implementation of the function used to tune and set
 *    ATA device disk transfer mode (PIO3, UDMA6, etc.).  If
 *    ata_dev_set_mode() fails, pointer to the failing device is
 *    returned in @r_failed_dev.
 *
 *    LOCKING:
 *    PCI/etc. bus probe sem.
 *
 *    RETURNS:
 *    0 on success, negative errno otherwise
 */

int ata_do_set_mode(struct ata_link *link, struct ata_device **r_failed_dev)
{
      struct ata_port *ap = link->ap;
      struct ata_device *dev;
      int rc = 0, used_dma = 0, found = 0;

      /* step 1: calculate xfer_mask */
      ata_link_for_each_dev(dev, link) {
            unsigned int pio_mask, dma_mask;
            unsigned int mode_mask;

            if (!ata_dev_enabled(dev))
                  continue;

            mode_mask = ATA_DMA_MASK_ATA;
            if (dev->class == ATA_DEV_ATAPI)
                  mode_mask = ATA_DMA_MASK_ATAPI;
            else if (ata_id_is_cfa(dev->id))
                  mode_mask = ATA_DMA_MASK_CFA;

            ata_dev_xfermask(dev);

            pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
            dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);

            if (libata_dma_mask & mode_mask)
                  dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
            else
                  dma_mask = 0;

            dev->pio_mode = ata_xfer_mask2mode(pio_mask);
            dev->dma_mode = ata_xfer_mask2mode(dma_mask);

            found = 1;
            if (dev->dma_mode)
                  used_dma = 1;
      }
      if (!found)
            goto out;

      /* step 2: always set host PIO timings */
      ata_link_for_each_dev(dev, link) {
            if (!ata_dev_enabled(dev))
                  continue;

            if (!dev->pio_mode) {
                  ata_dev_printk(dev, KERN_WARNING, "no PIO support\n");
                  rc = -EINVAL;
                  goto out;
            }

            dev->xfer_mode = dev->pio_mode;
            dev->xfer_shift = ATA_SHIFT_PIO;
            if (ap->ops->set_piomode)
                  ap->ops->set_piomode(ap, dev);
      }

      /* step 3: set host DMA timings */
      ata_link_for_each_dev(dev, link) {
            if (!ata_dev_enabled(dev) || !dev->dma_mode)
                  continue;

            dev->xfer_mode = dev->dma_mode;
            dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
            if (ap->ops->set_dmamode)
                  ap->ops->set_dmamode(ap, dev);
      }

      /* step 4: update devices' xfer mode */
      ata_link_for_each_dev(dev, link) {
            /* don't update suspended devices' xfer mode */
            if (!ata_dev_enabled(dev))
                  continue;

            rc = ata_dev_set_mode(dev);
            if (rc)
                  goto out;
      }

      /* Record simplex status. If we selected DMA then the other
       * host channels are not permitted to do so.
       */
      if (used_dma && (ap->host->flags & ATA_HOST_SIMPLEX))
            ap->host->simplex_claimed = ap;

 out:
      if (rc)
            *r_failed_dev = dev;
      return rc;
}

/**
 *    ata_set_mode - Program timings and issue SET FEATURES - XFER
 *    @link: link on which timings will be programmed
 *    @r_failed_dev: out paramter for failed device
 *
 *    Set ATA device disk transfer mode (PIO3, UDMA6, etc.).  If
 *    ata_set_mode() fails, pointer to the failing device is
 *    returned in @r_failed_dev.
 *
 *    LOCKING:
 *    PCI/etc. bus probe sem.
 *
 *    RETURNS:
 *    0 on success, negative errno otherwise
 */
int ata_set_mode(struct ata_link *link, struct ata_device **r_failed_dev)
{
      struct ata_port *ap = link->ap;

      /* has private set_mode? */
      if (ap->ops->set_mode)
            return ap->ops->set_mode(link, r_failed_dev);
      return ata_do_set_mode(link, r_failed_dev);
}

/**
 *    ata_tf_to_host - issue ATA taskfile to host controller
 *    @ap: port to which command is being issued
 *    @tf: ATA taskfile register set
 *
 *    Issues ATA taskfile register set to ATA host controller,
 *    with proper synchronization with interrupt handler and
 *    other threads.
 *
 *    LOCKING:
 *    spin_lock_irqsave(host lock)
 */

static inline void ata_tf_to_host(struct ata_port *ap,
                          const struct ata_taskfile *tf)
{
      ap->ops->tf_load(ap, tf);
      ap->ops->exec_command(ap, tf);
}

/**
 *    ata_busy_sleep - sleep until BSY clears, or timeout
 *    @ap: port containing status register to be polled
 *    @tmout_pat: impatience timeout
 *    @tmout: overall timeout
 *
 *    Sleep until ATA Status register bit BSY clears,
 *    or a timeout occurs.
 *
 *    LOCKING:
 *    Kernel thread context (may sleep).
 *
 *    RETURNS:
 *    0 on success, -errno otherwise.
 */
int ata_busy_sleep(struct ata_port *ap,
               unsigned long tmout_pat, unsigned long tmout)
{
      unsigned long timer_start, timeout;
      u8 status;

      status = ata_busy_wait(ap, ATA_BUSY, 300);
      timer_start = jiffies;
      timeout = timer_start + tmout_pat;
      while (status != 0xff && (status & ATA_BUSY) &&
             time_before(jiffies, timeout)) {
            msleep(50);
            status = ata_busy_wait(ap, ATA_BUSY, 3);
      }

      if (status != 0xff && (status & ATA_BUSY))
            ata_port_printk(ap, KERN_WARNING,
                        "port is slow to respond, please be patient "
                        "(Status 0x%x)\n", status);

      timeout = timer_start + tmout;
      while (status != 0xff && (status & ATA_BUSY) &&
             time_before(jiffies, timeout)) {
            msleep(50);
            status = ata_chk_status(ap);
      }

      if (status == 0xff)
            return -ENODEV;

      if (status & ATA_BUSY) {
            ata_port_printk(ap, KERN_ERR, "port failed to respond "
                        "(%lu secs, Status 0x%x)\n",
                        tmout / HZ, status);
            return -EBUSY;
      }

      return 0;
}

/**
 *    ata_wait_after_reset - wait before checking status after reset
 *    @ap: port containing status register to be polled
 *    @deadline: deadline jiffies for the operation
 *
 *    After reset, we need to pause a while before reading status.
 *    Also, certain combination of controller and device report 0xff
 *    for some duration (e.g. until SATA PHY is up and running)
 *    which is interpreted as empty port in ATA world.  This
 *    function also waits for such devices to get out of 0xff
 *    status.
 *
 *    LOCKING:
 *    Kernel thread context (may sleep).
 */
void ata_wait_after_reset(struct ata_port *ap, unsigned long deadline)
{
      unsigned long until = jiffies + ATA_TMOUT_FF_WAIT;

      if (time_before(until, deadline))
            deadline = until;

      /* Spec mandates ">= 2ms" before checking status.  We wait
       * 150ms, because that was the magic delay used for ATAPI
       * devices in Hale Landis's ATADRVR, for the period of time
       * between when the ATA command register is written, and then
       * status is checked.  Because waiting for "a while" before
       * checking status is fine, post SRST, we perform this magic
       * delay here as well.
       *
       * Old drivers/ide uses the 2mS rule and then waits for ready.
       */
      msleep(150);

      /* Wait for 0xff to clear.  Some SATA devices take a long time
       * to clear 0xff after reset.  For example, HHD424020F7SV00
       * iVDR needs >= 800ms while.  Quantum GoVault needs even more
       * than that.
       *
       * Note that some PATA controllers (pata_ali) explode if
       * status register is read more than once when there's no
       * device attached.
       */
      if (ap->flags & ATA_FLAG_SATA) {
            while (1) {
                  u8 status = ata_chk_status(ap);

                  if (status != 0xff || time_after(jiffies, deadline))
                        return;

                  msleep(50);
            }
      }
}

/**
 *    ata_wait_ready - sleep until BSY clears, or timeout
 *    @ap: port containing status register to be polled
 *    @deadline: deadline jiffies for the operation
 *
 *    Sleep until ATA Status register bit BSY clears, or timeout
 *    occurs.
 *
 *    LOCKING:
 *    Kernel thread context (may sleep).
 *
 *    RETURNS:
 *    0 on success, -errno otherwise.
 */
int ata_wait_ready(struct ata_port *ap, unsigned long deadline)
{
      unsigned long start = jiffies;
      int warned = 0;

      while (1) {
            u8 status = ata_chk_status(ap);
            unsigned long now = jiffies;

            if (!(status & ATA_BUSY))
                  return 0;
            if (!ata_link_online(&ap->link) && status == 0xff)
                  return -ENODEV;
            if (time_after(now, deadline))
                  return -EBUSY;

            if (!warned && time_after(now, start + 5 * HZ) &&
                (deadline - now > 3 * HZ)) {
                  ata_port_printk(ap, KERN_WARNING,
                        "port is slow to respond, please be patient "
                        "(Status 0x%x)\n", status);
                  warned = 1;
            }

            msleep(50);
      }
}

static int ata_bus_post_reset(struct ata_port *ap, unsigned int devmask,
                        unsigned long deadline)
{
      struct ata_ioports *ioaddr = &ap->ioaddr;
      unsigned int dev0 = devmask & (1 << 0);
      unsigned int dev1 = devmask & (1 << 1);
      int rc, ret = 0;

      /* if device 0 was found in ata_devchk, wait for its
       * BSY bit to clear
       */
      if (dev0) {
            rc = ata_wait_ready(ap, deadline);
            if (rc) {
                  if (rc != -ENODEV)
                        return rc;
                  ret = rc;
            }
      }

      /* if device 1 was found in ata_devchk, wait for register
       * access briefly, then wait for BSY to clear.
       */
      if (dev1) {
            int i;

            ap->ops->dev_select(ap, 1);

            /* Wait for register access.  Some ATAPI devices fail
             * to set nsect/lbal after reset, so don't waste too
             * much time on it.  We're gonna wait for !BSY anyway.
             */
            for (i = 0; i < 2; i++) {
                  u8 nsect, lbal;

                  nsect = ioread8(ioaddr->nsect_addr);
                  lbal = ioread8(ioaddr->lbal_addr);
                  if ((nsect == 1) && (lbal == 1))
                        break;
                  msleep(50); /* give drive a breather */
            }

            rc = ata_wait_ready(ap, deadline);
            if (rc) {
                  if (rc != -ENODEV)
                        return rc;
                  ret = rc;
            }
      }

      /* is all this really necessary? */
      ap->ops->dev_select(ap, 0);
      if (dev1)
            ap->ops->dev_select(ap, 1);
      if (dev0)
            ap->ops->dev_select(ap, 0);

      return ret;
}

static int ata_bus_softreset(struct ata_port *ap, unsigned int devmask,
                       unsigned long deadline)
{
      struct ata_ioports *ioaddr = &ap->ioaddr;

      DPRINTK("ata%u: bus reset via SRST\n", ap->print_id);

      /* software reset.  causes dev0 to be selected */
      iowrite8(ap->ctl, ioaddr->ctl_addr);
      udelay(20); /* FIXME: flush */
      iowrite8(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
      udelay(20); /* FIXME: flush */
      iowrite8(ap->ctl, ioaddr->ctl_addr);

      /* wait a while before checking status */
      ata_wait_after_reset(ap, deadline);

      /* Before we perform post reset processing we want to see if
       * the bus shows 0xFF because the odd clown forgets the D7
       * pulldown resistor.
       */
      if (ata_chk_status(ap) == 0xFF)
            return -ENODEV;

      return ata_bus_post_reset(ap, devmask, deadline);
}

/**
 *    ata_bus_reset - reset host port and associated ATA channel
 *    @ap: port to reset
 *
 *    This is typically the first time we actually start issuing
 *    commands to the ATA channel.  We wait for BSY to clear, then
 *    issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
 *    result.  Determine what devices, if any, are on the channel
 *    by looking at the device 0/1 error register.  Look at the signature
 *    stored in each device's taskfile registers, to determine if
 *    the device is ATA or ATAPI.
 *
 *    LOCKING:
 *    PCI/etc. bus probe sem.
 *    Obtains host lock.
 *
 *    SIDE EFFECTS:
 *    Sets ATA_FLAG_DISABLED if bus reset fails.
 */

void ata_bus_reset(struct ata_port *ap)
{
      struct ata_device *device = ap->link.device;
      struct ata_ioports *ioaddr = &ap->ioaddr;
      unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
      u8 err;
      unsigned int dev0, dev1 = 0, devmask = 0;
      int rc;

      DPRINTK("ENTER, host %u, port %u\n", ap->print_id, ap->port_no);

      /* determine if device 0/1 are present */
      if (ap->flags & ATA_FLAG_SATA_RESET)
            dev0 = 1;
      else {
            dev0 = ata_devchk(ap, 0);
            if (slave_possible)
                  dev1 = ata_devchk(ap, 1);
      }

      if (dev0)
            devmask |= (1 << 0);
      if (dev1)
            devmask |= (1 << 1);

      /* select device 0 again */
      ap->ops->dev_select(ap, 0);

      /* issue bus reset */
      if (ap->flags & ATA_FLAG_SRST) {
            rc = ata_bus_softreset(ap, devmask, jiffies + 40 * HZ);
            if (rc && rc != -ENODEV)
                  goto err_out;
      }

      /*
       * determine by signature whether we have ATA or ATAPI devices
       */
      device[0].class = ata_dev_try_classify(&device[0], dev0, &err);
      if ((slave_possible) && (err != 0x81))
            device[1].class = ata_dev_try_classify(&device[1], dev1, &err);

      /* is double-select really necessary? */
      if (device[1].class != ATA_DEV_NONE)
            ap->ops->dev_select(ap, 1);
      if (device[0].class != ATA_DEV_NONE)
            ap->ops->dev_select(ap, 0);

      /* if no devices were detected, disable this port */
      if ((device[0].class == ATA_DEV_NONE) &&
          (device[1].class == ATA_DEV_NONE))
            goto err_out;

      if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
            /* set up device control for ATA_FLAG_SATA_RESET */
            iowrite8(ap->ctl, ioaddr->ctl_addr);
      }

      DPRINTK("EXIT\n");
      return;

err_out:
      ata_port_printk(ap, KERN_ERR, "disabling port\n");
      ata_port_disable(ap);

      DPRINTK("EXIT\n");
}

/**
 *    sata_link_debounce - debounce SATA phy status
 *    @link: ATA link to debounce SATA phy status for
 *    @params: timing parameters { interval, duratinon, timeout } in msec
 *    @deadline: deadline jiffies for the operation
 *
*     Make sure SStatus of @link reaches stable state, determined by
 *    holding the same value where DET is not 1 for @duration polled
 *    every @interval, before @timeout.  Timeout constraints the
 *    beginning of the stable state.  Because DET gets stuck at 1 on
 *    some controllers after hot unplugging, this functions waits
 *    until timeout then returns 0 if DET is stable at 1.
 *
 *    @timeout is further limited by @deadline.  The sooner of the
 *    two is used.
 *
 *    LOCKING:
 *    Kernel thread context (may sleep)
 *
 *    RETURNS:
 *    0 on success, -errno on failure.
 */
int sata_link_debounce(struct ata_link *link, const unsigned long *params,
                   unsigned long deadline)
{
      unsigned long interval_msec = params[0];
      unsigned long duration = msecs_to_jiffies(params[1]);
      unsigned long last_jiffies, t;
      u32 last, cur;
      int rc;

      t = jiffies + msecs_to_jiffies(params[2]);
      if (time_before(t, deadline))
            deadline = t;

      if ((rc = sata_scr_read(link, SCR_STATUS, &cur)))
            return rc;
      cur &= 0xf;

      last = cur;
      last_jiffies = jiffies;

      while (1) {
            msleep(interval_msec);
            if ((rc = sata_scr_read(link, SCR_STATUS, &cur)))
                  return rc;
            cur &= 0xf;

            /* DET stable? */
            if (cur == last) {
                  if (cur == 1 && time_before(jiffies, deadline))
                        continue;
                  if (time_after(jiffies, last_jiffies + duration))
                        return 0;
                  continue;
            }

            /* unstable, start over */
            last = cur;
            last_jiffies = jiffies;

            /* Check deadline.  If debouncing failed, return
             * -EPIPE to tell upper layer to lower link speed.
             */
            if (time_after(jiffies, deadline))
                  return -EPIPE;
      }
}

/**
 *    sata_link_resume - resume SATA link
 *    @link: ATA link to resume SATA
 *    @params: timing parameters { interval, duratinon, timeout } in msec
 *    @deadline: deadline jiffies for the operation
 *
 *    Resume SATA phy @link and debounce it.
 *
 *    LOCKING:
 *    Kernel thread context (may sleep)
 *
 *    RETURNS:
 *    0 on success, -errno on failure.
 */
int sata_link_resume(struct ata_link *link, const unsigned long *params,
                 unsigned long deadline)
{
      u32 scontrol;
      int rc;

      if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
            return rc;

      scontrol = (scontrol & 0x0f0) | 0x300;

      if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
            return rc;

      /* Some PHYs react badly if SStatus is pounded immediately
       * after resuming.  Delay 200ms before debouncing.
       */
      msleep(200);

      return sata_link_debounce(link, params, deadline);
}

/**
 *    ata_std_prereset - prepare for reset
 *    @link: ATA link to be reset
 *    @deadline: deadline jiffies for the operation
 *
 *    @link is about to be reset.  Initialize it.  Failure from
 *    prereset makes libata abort whole reset sequence and give up
 *    that port, so prereset should be best-effort.  It does its
 *    best to prepare for reset sequence but if things go wrong, it
 *    should just whine, not fail.
 *
 *    LOCKING:
 *    Kernel thread context (may sleep)
 *
 *    RETURNS:
 *    0 on success, -errno otherwise.
 */
int ata_std_prereset(struct ata_link *link, unsigned long deadline)
{
      struct ata_port *ap = link->ap;
      struct ata_eh_context *ehc = &link->eh_context;
      const unsigned long *timing = sata_ehc_deb_timing(ehc);
      int rc;

      /* handle link resume */
      if ((ehc->i.flags & ATA_EHI_RESUME_LINK) &&
          (link->flags & ATA_LFLAG_HRST_TO_RESUME))
            ehc->i.action |= ATA_EH_HARDRESET;

      /* Some PMPs don't work with only SRST, force hardreset if PMP
       * is supported.
       */
      if (ap->flags & ATA_FLAG_PMP)
            ehc->i.action |= ATA_EH_HARDRESET;

      /* if we're about to do hardreset, nothing more to do */
      if (ehc->i.action & ATA_EH_HARDRESET)
            return 0;

      /* if SATA, resume link */
      if (ap->flags & ATA_FLAG_SATA) {
            rc = sata_link_resume(link, timing, deadline);
            /* whine about phy resume failure but proceed */
            if (rc && rc != -EOPNOTSUPP)
                  ata_link_printk(link, KERN_WARNING, "failed to resume "
                              "link for reset (errno=%d)\n", rc);
      }

      /* Wait for !BSY if the controller can wait for the first D2H
       * Reg FIS and we don't know that no device is attached.
       */
      if (!(link->flags & ATA_LFLAG_SKIP_D2H_BSY) && !ata_link_offline(link)) {
            rc = ata_wait_ready(ap, deadline);
            if (rc && rc != -ENODEV) {
                  ata_link_printk(link, KERN_WARNING, "device not ready "
                              "(errno=%d), forcing hardreset\n", rc);
                  ehc->i.action |= ATA_EH_HARDRESET;
            }
      }

      return 0;
}

/**
 *    ata_std_softreset - reset host port via ATA SRST
 *    @link: ATA link to reset
 *    @classes: resulting classes of attached devices
 *    @deadline: deadline jiffies for the operation
 *
 *    Reset host port using ATA SRST.
 *
 *    LOCKING:
 *    Kernel thread context (may sleep)
 *
 *    RETURNS:
 *    0 on success, -errno otherwise.
 */
int ata_std_softreset(struct ata_link *link, unsigned int *classes,
                  unsigned long deadline)
{
      struct ata_port *ap = link->ap;
      unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
      unsigned int devmask = 0;
      int rc;
      u8 err;

      DPRINTK("ENTER\n");

      if (ata_link_offline(link)) {
            classes[0] = ATA_DEV_NONE;
            goto out;
      }

      /* determine if device 0/1 are present */
      if (ata_devchk(ap, 0))
            devmask |= (1 << 0);
      if (slave_possible && ata_devchk(ap, 1))
            devmask |= (1 << 1);

      /* select device 0 again */
      ap->ops->dev_select(ap, 0);

      /* issue bus reset */
      DPRINTK("about to softreset, devmask=%x\n", devmask);
      rc = ata_bus_softreset(ap, devmask, deadline);
      /* if link is occupied, -ENODEV too is an error */
      if (rc && (rc != -ENODEV || sata_scr_valid(link))) {
            ata_link_printk(link, KERN_ERR, "SRST failed (errno=%d)\n", rc);
            return rc;
      }

      /* determine by signature whether we have ATA or ATAPI devices */
      classes[0] = ata_dev_try_classify(&link->device[0],
                                devmask & (1 << 0), &err);
      if (slave_possible && err != 0x81)
            classes[1] = ata_dev_try_classify(&link->device[1],
                                      devmask & (1 << 1), &err);

 out:
      DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
      return 0;
}

/**
 *    sata_link_hardreset - reset link via SATA phy reset
 *    @link: link to reset
 *    @timing: timing parameters { interval, duratinon, timeout } in msec
 *    @deadline: deadline jiffies for the operation
 *
 *    SATA phy-reset @link using DET bits of SControl register.
 *
 *    LOCKING:
 *    Kernel thread context (may sleep)
 *
 *    RETURNS:
 *    0 on success, -errno otherwise.
 */
int sata_link_hardreset(struct ata_link *link, const unsigned long *timing,
                  unsigned long deadline)
{
      u32 scontrol;
      int rc;

      DPRINTK("ENTER\n");

      if (sata_set_spd_needed(link)) {
            /* SATA spec says nothing about how to reconfigure
             * spd.  To be on the safe side, turn off phy during
             * reconfiguration.  This works for at least ICH7 AHCI
             * and Sil3124.
             */
            if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
                  goto out;

            scontrol = (scontrol & 0x0f0) | 0x304;

            if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
                  goto out;

            sata_set_spd(link);
      }

      /* issue phy wake/reset */
      if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
            goto out;

      scontrol = (scontrol & 0x0f0) | 0x301;

      if ((rc = sata_scr_write_flush(link, SCR_CONTROL, scontrol)))
            goto out;

      /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
       * 10.4.2 says at least 1 ms.
       */
      msleep(1);

      /* bring link back */
      rc = sata_link_resume(link, timing, deadline);
 out:
      DPRINTK("EXIT, rc=%d\n", rc);
      return rc;
}

/**
 *    sata_std_hardreset - reset host port via SATA phy reset
 *    @link: link to reset
 *    @class: resulting class of attached device
 *    @deadline: deadline jiffies for the operation
 *
 *    SATA phy-reset host port using DET bits of SControl register,
 *    wait for !BSY and classify the attached device.
 *
 *    LOCKING:
 *    Kernel thread context (may sleep)
 *
 *    RETURNS:
 *    0 on success, -errno otherwise.
 */
int sata_std_hardreset(struct ata_link *link, unsigned int *class,
                   unsigned long deadline)
{
      struct ata_port *ap = link->ap;
      const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context);
      int rc;

      DPRINTK("ENTER\n");

      /* do hardreset */
      rc = sata_link_hardreset(link, timing, deadline);
      if (rc) {
            ata_link_printk(link, KERN_ERR,
                        "COMRESET failed (errno=%d)\n", rc);
            return rc;
      }

      /* TODO: phy layer with polling, timeouts, etc. */
      if (ata_link_offline(link)) {
            *class = ATA_DEV_NONE;
            DPRINTK("EXIT, link offline\n");
            return 0;
      }

      /* wait a while before checking status */
      ata_wait_after_reset(ap, deadline);

      /* If PMP is supported, we have to do follow-up SRST.  Note
       * that some PMPs don't send D2H Reg FIS after hardreset at
       * all if the first port is empty.  Wait for it just for a
       * second and request follow-up SRST.
       */
      if (ap->flags & ATA_FLAG_PMP) {
            ata_wait_ready(ap, jiffies + HZ);
            return -EAGAIN;
      }

      rc = ata_wait_ready(ap, deadline);
      /* link occupied, -ENODEV too is an error */
      if (rc) {
            ata_link_printk(link, KERN_ERR,
                        "COMRESET failed (errno=%d)\n", rc);
            return rc;
      }

      ap->ops->dev_select(ap, 0);   /* probably unnecessary */

      *class = ata_dev_try_classify(link->device, 1, NULL);

      DPRINTK("EXIT, class=%u\n", *class);
      return 0;
}

/**
 *    ata_std_postreset - standard postreset callback
 *    @link: the target ata_link
 *    @classes: classes of attached devices
 *
 *    This function is invoked after a successful reset.  Note that
 *    the device might have been reset more than once using
 *    different reset methods before postreset is invoked.
 *
 *    LOCKING:
 *    Kernel thread context (may sleep)
 */
void ata_std_postreset(struct ata_link *link, unsigned int *classes)
{
      struct ata_port *ap = link->ap;
      u32 serror;

      DPRINTK("ENTER\n");

      /* print link status */
      sata_print_link_status(link);

      /* clear SError */
      if (sata_scr_read(link, SCR_ERROR, &serror) == 0)
            sata_scr_write(link, SCR_ERROR, serror);
      link->eh_info.serror = 0;

      /* is double-select really necessary? */
      if (classes[0] != ATA_DEV_NONE)
            ap->ops->dev_select(ap, 1);
      if (classes[1] != ATA_DEV_NONE)
            ap->ops->dev_select(ap, 0);

      /* bail out if no device is present */
      if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
            DPRINTK("EXIT, no device\n");
            return;
      }

      /* set up device control */
      if (ap->ioaddr.ctl_addr)
            iowrite8(ap->ctl, ap->ioaddr.ctl_addr);

      DPRINTK("EXIT\n");
}

/**
 *    ata_dev_same_device - Determine whether new ID matches configured device
 *    @dev: device to compare against
 *    @new_class: class of the new device
 *    @new_id: IDENTIFY page of the new device
 *
 *    Compare @new_class and @new_id against @dev and determine
 *    whether @dev is the device indicated by @new_class and
 *    @new_id.
 *
 *    LOCKING:
 *    None.
 *
 *    RETURNS:
 *    1 if @dev matches @new_class and @new_id, 0 otherwise.
 */
static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class,
                         const u16 *new_id)
{
      const u16 *old_id = dev->id;
      unsigned char model[2][ATA_ID_PROD_LEN + 1];
      unsigned char serial[2][ATA_ID_SERNO_LEN + 1];

      if (dev->class != new_class) {
            ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n",
                         dev->class, new_class);
            return 0;
      }

      ata_id_c_string(old_id, model[0], ATA_ID_PROD, sizeof(model[0]));
      ata_id_c_string(new_id, model[1], ATA_ID_PROD, sizeof(model[1]));
      ata_id_c_string(old_id, serial[0], ATA_ID_SERNO, sizeof(serial[0]));
      ata_id_c_string(new_id, serial[1], ATA_ID_SERNO, sizeof(serial[1]));

      if (strcmp(model[0], model[1])) {
            ata_dev_printk(dev, KERN_INFO, "model number mismatch "
                         "'%s' != '%s'\n", model[0], model[1]);
            return 0;
      }

      if (strcmp(serial[0], serial[1])) {
            ata_dev_printk(dev, KERN_INFO, "serial number mismatch "
                         "'%s' != '%s'\n", serial[0], serial[1]);
            return 0;
      }

      return 1;
}

/**
 *    ata_dev_reread_id - Re-read IDENTIFY data
 *    @dev: target ATA device
 *    @readid_flags: read ID flags
 *
 *    Re-read IDENTIFY page and make sure @dev is still attached to
 *    the port.
 *
 *    LOCKING:
 *    Kernel thread context (may sleep)
 *
 *    RETURNS:
 *    0 on success, negative errno otherwise
 */
int ata_dev_reread_id(struct ata_device *dev, unsigned int readid_flags)
{
      unsigned int class = dev->class;
      u16 *id = (void *)dev->link->ap->sector_buf;
      int rc;

      /* read ID data */
      rc = ata_dev_read_id(dev, &class, readid_flags, id);
      if (rc)
            return rc;

      /* is the device still there? */
      if (!ata_dev_same_device(dev, class, id))
            return -ENODEV;

      memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS);
      return 0;
}

/**
 *    ata_dev_revalidate - Revalidate ATA device
 *    @dev: device to revalidate
 *    @new_class: new class code
 *    @readid_flags: read ID flags
 *
 *    Re-read IDENTIFY page, make sure @dev is still attached to the
 *    port and reconfigure it according to the new IDENTIFY page.
 *
 *    LOCKING:
 *    Kernel thread context (may sleep)
 *
 *    RETURNS:
 *    0 on success, negative errno otherwise
 */
int ata_dev_revalidate(struct ata_device *dev, unsigned int new_class,
                   unsigned int readid_flags)
{
      u64 n_sectors = dev->n_sectors;
      int rc;

      if (!ata_dev_enabled(dev))
            return -ENODEV;

      /* fail early if !ATA && !ATAPI to avoid issuing [P]IDENTIFY to PMP */
      if (ata_class_enabled(new_class) &&
          new_class != ATA_DEV_ATA && new_class != ATA_DEV_ATAPI) {
            ata_dev_printk(dev, KERN_INFO, "class mismatch %u != %u\n",
                         dev->class, new_class);
            rc = -ENODEV;
            goto fail;
      }

      /* re-read ID */
      rc = ata_dev_reread_id(dev, readid_flags);
      if (rc)
            goto fail;

      /* configure device according to the new ID */
      rc = ata_dev_configure(dev);
      if (rc)
            goto fail;

      /* verify n_sectors hasn't changed */
      if (dev->class == ATA_DEV_ATA && n_sectors &&
          dev->n_sectors != n_sectors) {
            ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch "
                         "%llu != %llu\n",
                         (unsigned long long)n_sectors,
                         (unsigned long long)dev->n_sectors);

            /* restore original n_sectors */
            dev->n_sectors = n_sectors;

            rc = -ENODEV;
            goto fail;
      }

      return 0;

 fail:
      ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc);
      return rc;
}

struct ata_blacklist_entry {
      const char *model_num;
      const char *model_rev;
      unsigned long horkage;
};

static const struct ata_blacklist_entry ata_device_blacklist [] = {
      /* Devices with DMA related problems under Linux */
      { "WDC AC11000H", NULL,       ATA_HORKAGE_NODMA },
      { "WDC AC22100H", NULL,       ATA_HORKAGE_NODMA },
      { "WDC AC32500H", NULL,       ATA_HORKAGE_NODMA },
      { "WDC AC33100H", NULL,       ATA_HORKAGE_NODMA },
      { "WDC AC31600H", NULL,       ATA_HORKAGE_NODMA },
      { "WDC AC32100H", "24.09P07", ATA_HORKAGE_NODMA },
      { "WDC AC23200L", "21.10N21", ATA_HORKAGE_NODMA },
      { "Compaq CRD-8241B",   NULL,       ATA_HORKAGE_NODMA },
      { "CRD-8400B",          NULL,             ATA_HORKAGE_NODMA },
      { "CRD-8480B",          NULL,       ATA_HORKAGE_NODMA },
      { "CRD-8482B",          NULL,       ATA_HORKAGE_NODMA },
      { "CRD-84",       NULL,       ATA_HORKAGE_NODMA },
      { "SanDisk SDP3B",      NULL,       ATA_HORKAGE_NODMA },
      { "SanDisk SDP3B-64",   NULL,       ATA_HORKAGE_NODMA },
      { "SANYO CD-ROM CRD",   NULL,       ATA_HORKAGE_NODMA },
      { "HITACHI CDR-8",      NULL,       ATA_HORKAGE_NODMA },
      { "HITACHI CDR-8335",   NULL,       ATA_HORKAGE_NODMA },
      { "HITACHI CDR-8435",   NULL,       ATA_HORKAGE_NODMA },
      { "Toshiba CD-ROM XM-6202B", NULL,  ATA_HORKAGE_NODMA },
      { "TOSHIBA CD-ROM XM-1702BC", NULL, ATA_HORKAGE_NODMA },
      { "CD-532E-A",          NULL,       ATA_HORKAGE_NODMA },
      { "E-IDE CD-ROM CR-840",NULL,       ATA_HORKAGE_NODMA },
      { "CD-ROM Drive/F5A",   NULL,       ATA_HORKAGE_NODMA },
      { "WPI CDD-820",  NULL,       ATA_HORKAGE_NODMA },
      { "SAMSUNG CD-ROM SC-148C", NULL,   ATA_HORKAGE_NODMA },
      { "SAMSUNG CD-ROM SC",  NULL,       ATA_HORKAGE_NODMA },
      { "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,ATA_HORKAGE_NODMA },
      { "_NEC DV5800A",       NULL,       ATA_HORKAGE_NODMA },
      { "SAMSUNG CD-ROM SN-124", "N001",  ATA_HORKAGE_NODMA },
      { "Seagate STT20000A", NULL,        ATA_HORKAGE_NODMA },
      /* Odd clown on sil3726/4726 PMPs */
      { "Config  Disk", NULL,       ATA_HORKAGE_NODMA |
                                    ATA_HORKAGE_SKIP_PM },

      /* Weird ATAPI devices */
      { "TORiSAN DVD-ROM DRD-N216", NULL, ATA_HORKAGE_MAX_SEC_128 },

      /* Devices we expect to fail diagnostics */

      /* Devices where NCQ should be avoided */
      /* NCQ is slow */
      { "WDC WD740ADFD-00",   NULL,       ATA_HORKAGE_NONCQ },
      { "WDC WD740ADFD-00NLR1", NULL,           ATA_HORKAGE_NONCQ, },
      /* http://thread.gmane.org/gmane.linux.ide/14907 */
      { "FUJITSU MHT2060BH",  NULL,       ATA_HORKAGE_NONCQ },
      /* NCQ is broken */
      { "Maxtor *",           "BANC*",    ATA_HORKAGE_NONCQ },
      { "Maxtor 7V300F0",     "VA111630", ATA_HORKAGE_NONCQ },
      { "HITACHI HDS7250SASUN500G*", NULL,    ATA_HORKAGE_NONCQ },
      { "HITACHI HDS7225SBSUN250G*", NULL,    ATA_HORKAGE_NONCQ },
      { "ST380817AS",         "3.42",           ATA_HORKAGE_NONCQ },
      { "ST3160023AS",  "3.42",           ATA_HORKAGE_NONCQ },

      /* Blacklist entries taken from Silicon Image 3124/3132
         Windows driver .inf file - also several Linux problem reports */
      { "HTS541060G9SA00",    "MB3OC60D",     ATA_HORKAGE_NONCQ, },
      { "HTS541080G9SA00",    "MB4OC60D",     ATA_HORKAGE_NONCQ, },
      { "HTS541010G9SA00",    "MBZOC60D",     ATA_HORKAGE_NONCQ, },

      /* devices which puke on READ_NATIVE_MAX */
      { "HDS724040KLSA80",    "KFAOA20N", ATA_HORKAGE_BROKEN_HPA, },
      { "WDC WD3200JD-00KLB0", "WD-WCAMR1130137", ATA_HORKAGE_BROKEN_HPA },
      { "WDC WD2500JD-00HBB0", "WD-WMAL71490727", ATA_HORKAGE_BROKEN_HPA },
      { "MAXTOR 6L080L4",     "A93.0500", ATA_HORKAGE_BROKEN_HPA },

      /* Devices which report 1 sector over size HPA */
      { "ST340823A",          NULL,       ATA_HORKAGE_HPA_SIZE, },
      { "ST320413A",          NULL,       ATA_HORKAGE_HPA_SIZE, },

      /* Devices which get the IVB wrong */
      { "QUANTUM FIREBALLlct10 05", "A03.0900", ATA_HORKAGE_IVB, },
      { "TSSTcorp CDDVDW SH-S202J", "SB00",       ATA_HORKAGE_IVB, },
      { "TSSTcorp CDDVDW SH-S202J", "SB01",       ATA_HORKAGE_IVB, },
      { "TSSTcorp CDDVDW SH-S202N", "SB00",       ATA_HORKAGE_IVB, },
      { "TSSTcorp CDDVDW SH-S202N", "SB01",       ATA_HORKAGE_IVB, },

      /* End Marker */
      { }
};

static int strn_pattern_cmp(const char *patt, const char *name, int wildchar)
{
      const char *p;
      int len;

      /*
       * check for trailing wildcard: *\0
       */
      p = strchr(patt, wildchar);
      if (p && ((*(p + 1)) == 0))
            len = p - patt;
      else {
            len = strlen(name);
            if (!len) {
                  if (!*patt)
                        return 0;
                  return -1;
            }
      }

      return strncmp(patt, name, len);
}

static unsigned long ata_dev_blacklisted(const struct ata_device *dev)
{
      unsigned char model_num[ATA_ID_PROD_LEN + 1];
      unsigned char model_rev[ATA_ID_FW_REV_LEN + 1];
      const struct ata_blacklist_entry *ad = ata_device_blacklist;

      ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num));
      ata_id_c_string(dev->id, model_rev, ATA_ID_FW_REV, sizeof(model_rev));

      while (ad->model_num) {
            if (!strn_pattern_cmp(ad->model_num, model_num, '*')) {
                  if (ad->model_rev == NULL)
                        return ad->horkage;
                  if (!strn_pattern_cmp(ad->model_rev, model_rev, '*'))
                        return ad->horkage;
            }
            ad++;
      }
      return 0;
}

static int ata_dma_blacklisted(const struct ata_device *dev)
{
      /* We don't support polling DMA.
       * DMA blacklist those ATAPI devices with CDB-intr (and use PIO)
       * if the LLDD handles only interrupts in the HSM_ST_LAST state.
       */
      if ((dev->link->ap->flags & ATA_FLAG_PIO_POLLING) &&
          (dev->flags & ATA_DFLAG_CDB_INTR))
            return 1;
      return (dev->horkage & ATA_HORKAGE_NODMA) ? 1 : 0;
}

/**
 *    ata_is_40wire           -     check drive side detection
 *    @dev: device
 *
 *    Perform drive side detection decoding, allowing for device vendors
 *    who can't follow the documentation.
 */

static int ata_is_40wire(struct ata_device *dev)
{
      if (dev->horkage & ATA_HORKAGE_IVB)
            return ata_drive_40wire_relaxed(dev->id);
      return ata_drive_40wire(dev->id);
}

/**
 *    ata_dev_xfermask - Compute supported xfermask of the given device
 *    @dev: Device to compute xfermask for
 *
 *    Compute supported xfermask of @dev and store it in
 *    dev->*_mask.  This function is responsible for applying all
 *    known limits including host controller limits, device
 *    blacklist, etc...
 *
 *    LOCKING:
 *    None.
 */
static void ata_dev_xfermask(struct ata_device *dev)
{
      struct ata_link *link = dev->link;
      struct ata_port *ap = link->ap;
      struct ata_host *host = ap->host;
      unsigned long xfer_mask;

      /* controller modes available */
      xfer_mask = ata_pack_xfermask(ap->pio_mask,
                              ap->mwdma_mask, ap->udma_mask);

      /* drive modes available */
      xfer_mask &= ata_pack_xfermask(dev->pio_mask,
                               dev->mwdma_mask, dev->udma_mask);
      xfer_mask &= ata_id_xfermask(dev->id);

      /*
       *    CFA Advanced TrueIDE timings are not allowed on a shared
       *    cable
       */
      if (ata_dev_pair(dev)) {
            /* No PIO5 or PIO6 */
            xfer_mask &= ~(0x03 << (ATA_SHIFT_PIO + 5));
            /* No MWDMA3 or MWDMA 4 */
            xfer_mask &= ~(0x03 << (ATA_SHIFT_MWDMA + 3));
      }

      if (ata_dma_blacklisted(dev)) {
            xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
            ata_dev_printk(dev, KERN_WARNING,
                         "device is on DMA blacklist, disabling DMA\n");
      }

      if ((host->flags & ATA_HOST_SIMPLEX) &&
          host->simplex_claimed && host->simplex_claimed != ap) {
            xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
            ata_dev_printk(dev, KERN_WARNING, "simplex DMA is claimed by "
                         "other device, disabling DMA\n");
      }

      if (ap->flags & ATA_FLAG_NO_IORDY)
            xfer_mask &= ata_pio_mask_no_iordy(dev);

      if (ap->ops->mode_filter)
            xfer_mask = ap->ops->mode_filter(dev, xfer_mask);

      /* Apply cable rule here.  Don't apply it early because when
       * we handle hot plug the cable type can itself change.
       * Check this last so that we know if the transfer rate was
       * solely limited by the cable.
       * Unknown or 80 wire cables reported host side are checked
       * drive side as well. Cases where we know a 40wire cable
       * is used safely for 80 are not checked here.
       */
      if (xfer_mask & (0xF8 << ATA_SHIFT_UDMA))
            /* UDMA/44 or higher would be available */
            if ((ap->cbl == ATA_CBL_PATA40) ||
                (ata_is_40wire(dev) &&
                (ap->cbl == ATA_CBL_PATA_UNK ||
                 ap->cbl == ATA_CBL_PATA80))) {
                  ata_dev_printk(dev, KERN_WARNING,
                         "limited to UDMA/33 due to 40-wire cable\n");
                  xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
            }

      ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
                      &dev->mwdma_mask, &dev->udma_mask);
}

/**
 *    ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
 *    @dev: Device to which command will be sent
 *
 *    Issue SET FEATURES - XFER MODE command to device @dev
 *    on port @ap.
 *
 *    LOCKING:
 *    PCI/etc. bus probe sem.
 *
 *    RETURNS:
 *    0 on success, AC_ERR_* mask otherwise.
 */

static unsigned int ata_dev_set_xfermode(struct ata_device *dev)
{
      struct ata_taskfile tf;
      unsigned int err_mask;

      /* set up set-features taskfile */
      DPRINTK("set features - xfer mode\n");

      /* Some controllers and ATAPI devices show flaky interrupt
       * behavior after setting xfer mode.  Use polling instead.
       */
      ata_tf_init(dev, &tf);
      tf.command = ATA_CMD_SET_FEATURES;
      tf.feature = SETFEATURES_XFER;
      tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE | ATA_TFLAG_POLLING;
      tf.protocol = ATA_PROT_NODATA;
      tf.nsect = dev->xfer_mode;

      err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);

      DPRINTK("EXIT, err_mask=%x\n", err_mask);
      return err_mask;
}
/**
 *    ata_dev_set_feature - Issue SET FEATURES - SATA FEATURES
 *    @dev: Device to which command will be sent
 *    @enable: Whether to enable or disable the feature
 *    @feature: The sector count represents the feature to set
 *
 *    Issue SET FEATURES - SATA FEATURES command to device @dev
 *    on port @ap with sector count
 *
 *    LOCKING:
 *    PCI/etc. bus probe sem.
 *
 *    RETURNS:
 *    0 on success, AC_ERR_* mask otherwise.
 */
static unsigned int ata_dev_set_feature(struct ata_device *dev, u8 enable,
                              u8 feature)
{
      struct ata_taskfile tf;
      unsigned int err_mask;

      /* set up set-features taskfile */
      DPRINTK("set features - SATA features\n");

      ata_tf_init(dev, &tf);
      tf.command = ATA_CMD_SET_FEATURES;
      tf.feature = enable;
      tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
      tf.protocol = ATA_PROT_NODATA;
      tf.nsect = feature;

      err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);

      DPRINTK("EXIT, err_mask=%x\n", err_mask);
      return err_mask;
}

/**
 *    ata_dev_init_params - Issue INIT DEV PARAMS command
 *    @dev: Device to which command will be sent
 *    @heads: Number of heads (taskfile parameter)
 *    @sectors: Number of sectors (taskfile parameter)
 *
 *    LOCKING:
 *    Kernel thread context (may sleep)
 *
 *    RETURNS:
 *    0 on success, AC_ERR_* mask otherwise.
 */
static unsigned int ata_dev_init_params(struct ata_device *dev,
                              u16 heads, u16 sectors)
{
      struct ata_taskfile tf;
      unsigned int err_mask;

      /* Number of sectors per track 1-255. Number of heads 1-16 */
      if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
            return AC_ERR_INVALID;

      /* set up init dev params taskfile */
      DPRINTK("init dev params \n");

      ata_tf_init(dev, &tf);
      tf.command = ATA_CMD_INIT_DEV_PARAMS;
      tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
      tf.protocol = ATA_PROT_NODATA;
      tf.nsect = sectors;
      tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */

      err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
      /* A clean abort indicates an original or just out of spec drive
         and we should continue as we issue the setup based on the
         drive reported working geometry */
      if (err_mask == AC_ERR_DEV && (tf.feature & ATA_ABORTED))
            err_mask = 0;

      DPRINTK("EXIT, err_mask=%x\n", err_mask);
      return err_mask;
}

/**
 *    ata_sg_clean - Unmap DMA memory associated with command
 *    @qc: Command containing DMA memory to be released
 *
 *    Unmap all mapped DMA memory associated with this command.
 *
 *    LOCKING:
 *    spin_lock_irqsave(host lock)
 */
void ata_sg_clean(struct ata_queued_cmd *qc)
{
      struct ata_port *ap = qc->ap;
      struct scatterlist *sg = qc->__sg;
      int dir = qc->dma_dir;
      void *pad_buf = NULL;

      WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
      WARN_ON(sg == NULL);

      if (qc->flags & ATA_QCFLAG_SINGLE)
            WARN_ON(qc->n_elem > 1);

      VPRINTK("unmapping %u sg elements\n", qc->n_elem);

      /* if we padded the buffer out to 32-bit bound, and data
       * xfer direction is from-device, we must copy from the
       * pad buffer back into the supplied buffer
       */
      if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
            pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);

      if (qc->flags & ATA_QCFLAG_SG) {
            if (qc->n_elem)
                  dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
            /* restore last sg */
            sg_last(sg, qc->orig_n_elem)->length += qc->pad_len;
            if (pad_buf) {
                  struct scatterlist *psg = &qc->pad_sgent;
                  void *addr = kmap_atomic(sg_page(psg), KM_IRQ0);
                  memcpy(addr + psg->offset, pad_buf, qc->pad_len);
                  kunmap_atomic(addr, KM_IRQ0);
            }
      } else {
            if (qc->n_elem)
                  dma_unmap_single(ap->dev,
                        sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
                        dir);
            /* restore sg */
            sg->length += qc->pad_len;
            if (pad_buf)
                  memcpy(qc->buf_virt + sg->length - qc->pad_len,
                         pad_buf, qc->pad_len);
      }

      qc->flags &= ~ATA_QCFLAG_DMAMAP;
      qc->__sg = NULL;
}

/**
 *    ata_fill_sg - Fill PCI IDE PRD table
 *    @qc: Metadata associated with taskfile to be transferred
 *
 *    Fill PCI IDE PRD (scatter-gather) table with segments
 *    associated with the current disk command.
 *
 *    LOCKING:
 *    spin_lock_irqsave(host lock)
 *
 */
static void ata_fill_sg(struct ata_queued_cmd *qc)
{
      struct ata_port *ap = qc->ap;
      struct scatterlist *sg;
      unsigned int idx;

      WARN_ON(qc->__sg == NULL);
      WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);

      idx = 0;
      ata_for_each_sg(sg, qc) {
            u32 addr, offset;
            u32 sg_len, len;

            /* determine if physical DMA addr spans 64K boundary.
             * Note h/w doesn't support 64-bit, so we unconditionally
             * truncate dma_addr_t to u32.
             */
            addr = (u32) sg_dma_address(sg);
            sg_len = sg_dma_len(sg);

            while (sg_len) {
                  offset = addr & 0xffff;
                  len = sg_len;
                  if ((offset + sg_len) > 0x10000)
                        len = 0x10000 - offset;

                  ap->prd[idx].addr = cpu_to_le32(addr);
                  ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
                  VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);

                  idx++;
                  sg_len -= len;
                  addr += len;
            }
      }

      if (idx)
            ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
}

/**
 *    ata_fill_sg_dumb - Fill PCI IDE PRD table
 *    @qc: Metadata associated with taskfile to be transferred
 *
 *    Fill PCI IDE PRD (scatter-gather) table with segments
 *    associated with the current disk command. Perform the fill
 *    so that we avoid writing any length 64K records for
 *    controllers that don't follow the spec.
 *
 *    LOCKING:
 *    spin_lock_irqsave(host lock)
 *
 */
static void ata_fill_sg_dumb(struct ata_queued_cmd *qc)
{
      struct ata_port *ap = qc->ap;
      struct scatterlist *sg;
      unsigned int idx;

      WARN_ON(qc->__sg == NULL);
      WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);

      idx = 0;
      ata_for_each_sg(sg, qc) {
            u32 addr, offset;
            u32 sg_len, len, blen;

            /* determine if physical DMA addr spans 64K boundary.
             * Note h/w doesn't support 64-bit, so we unconditionally
             * truncate dma_addr_t to u32.
             */
            addr = (u32) sg_dma_address(sg);
            sg_len = sg_dma_len(sg);

            while (sg_len) {
                  offset = addr & 0xffff;
                  len = sg_len;
                  if ((offset + sg_len) > 0x10000)
                        len = 0x10000 - offset;

                  blen = len & 0xffff;
                  ap->prd[idx].addr = cpu_to_le32(addr);
                  if (blen == 0) {
                     /* Some PATA chipsets like the CS5530 can't
                        cope with 0x0000 meaning 64K as the spec says */
                        ap->prd[idx].flags_len = cpu_to_le32(0x8000);
                        blen = 0x8000;
                        ap->prd[++idx].addr = cpu_to_le32(addr + 0x8000);
                  }
                  ap->prd[idx].flags_len = cpu_to_le32(blen);
                  VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);

                  idx++;
                  sg_len -= len;
                  addr += len;
            }
      }

      if (idx)
            ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
}

/**
 *    ata_check_atapi_dma - Check whether ATAPI DMA can be supported
 *    @qc: Metadata associated with taskfile to check
 *
 *    Allow low-level driver to filter ATA PACKET commands, returning
 *    a status indicating whether or not it is OK to use DMA for the
 *    supplied PACKET command.
 *
 *    LOCKING:
 *    spin_lock_irqsave(host lock)
 *
 *    RETURNS: 0 when ATAPI DMA can be used
 *               nonzero otherwise
 */
int ata_check_atapi_dma(struct ata_queued_cmd *qc)
{
      struct ata_port *ap = qc->ap;

      /* Don't allow DMA if it isn't multiple of 16 bytes.  Quite a
       * few ATAPI devices choke on such DMA requests.
       */
      if (unlikely(qc->nbytes & 15))
            return 1;

      if (ap->ops->check_atapi_dma)
            return ap->ops->check_atapi_dma(qc);

      return 0;
}

/**
 *    atapi_qc_may_overflow - Check whether data transfer may overflow
 *    @qc: ATA command in question
 *
 *    ATAPI commands which transfer variable length data to host
 *    might overflow due to application error or hardare bug.  This
 *    function checks whether overflow should be drained and ignored
 *    for @qc.
 *
 *    LOCKING:
 *    None.
 *
 *    RETURNS:
 *    1 if @qc may overflow; otherwise, 0.
 */
static int atapi_qc_may_overflow(struct ata_queued_cmd *qc)
{
      if (qc->tf.protocol != ATA_PROT_ATAPI &&
          qc->tf.protocol != ATA_PROT_ATAPI_DMA)
            return 0;

      if (qc->tf.flags & ATA_TFLAG_WRITE)
            return 0;

      switch (qc->cdb[0]) {
      case READ_10:
      case READ_12:
      case WRITE_10:
      case WRITE_12:
      case GPCMD_READ_CD:
      case GPCMD_READ_CD_MSF:
            return 0;
      }

      return 1;
}

/**
 *    ata_std_qc_defer - Check whether a qc needs to be deferred
 *    @qc: ATA command in question
 *
 *    Non-NCQ commands cannot run with any other command, NCQ or
 *    not.  As upper layer only knows the queue depth, we are
 *    responsible for maintaining exclusion.  This function checks
 *    whether a new command @qc can be issued.
 *
 *    LOCKING:
 *    spin_lock_irqsave(host lock)
 *
 *    RETURNS:
 *    ATA_DEFER_* if deferring is needed, 0 otherwise.
 */
int ata_std_qc_defer(struct ata_queued_cmd *qc)
{
      struct ata_link *link = qc->dev->link;

      if (qc->tf.protocol == ATA_PROT_NCQ) {
            if (!ata_tag_valid(link->active_tag))
                  return 0;
      } else {
            if (!ata_tag_valid(link->active_tag) && !link->sactive)
                  return 0;
      }

      return ATA_DEFER_LINK;
}

/**
 *    ata_qc_prep - Prepare taskfile for submission
 *    @qc: Metadata associated with taskfile to be prepared
 *
 *    Prepare ATA taskfile for submission.
 *
 *    LOCKING:
 *    spin_lock_irqsave(host lock)
 */
void ata_qc_prep(struct ata_queued_cmd *qc)
{
      if (!(qc->flags & ATA_QCFLAG_DMAMAP))
            return;

      ata_fill_sg(qc);
}

/**
 *    ata_dumb_qc_prep - Prepare taskfile for submission
 *    @qc: Metadata associated with taskfile to be prepared
 *
 *    Prepare ATA taskfile for submission.
 *
 *    LOCKING:
 *    spin_lock_irqsave(host lock)
 */
void ata_dumb_qc_prep(struct ata_queued_cmd *qc)
{
      if (!(qc->flags & ATA_QCFLAG_DMAMAP))
            return;

      ata_fill_sg_dumb(qc);
}

void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }

/**
 *    ata_sg_init_one - Associate command with memory buffer
 *    @qc: Command to be associated
 *    @buf: Memory buffer
 *    @buflen: Length of memory buffer, in bytes.
 *
 *    Initialize the data-related elements of queued_cmd @qc
 *    to point to a single memory buffer, @buf of byte length @buflen.
 *
 *    LOCKING:
 *    spin_lock_irqsave(host lock)
 */

void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
{
      qc->flags |= ATA_QCFLAG_SINGLE;

      qc->__sg = &qc->sgent;
      qc->n_elem = 1;
      qc->orig_n_elem = 1;
      qc->buf_virt = buf;
      qc->nbytes = buflen;
      qc->cursg = qc->__sg;

      sg_init_one(&qc->sgent, buf, buflen);
}

/**
 *    ata_sg_init - Associate command with scatter-gather table.
 *    @qc: Command to be associated
 *    @sg: Scatter-gather table.
 *    @n_elem: Number of elements in s/g table.
 *
 *    Initialize the data-related elements of queued_cmd @qc
 *    to point to a scatter-gather table @sg, containing @n_elem
 *    elements.
 *
 *    LOCKING:
 *    spin_lock_irqsave(host lock)
 */

void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
             unsigned int n_elem)
{
      qc->flags |= ATA_QCFLAG_SG;
      qc->__sg = sg;
      qc->n_elem = n_elem;
      qc->orig_n_elem = n_elem;
      qc->cursg = qc->__sg;
}

/**
 *    ata_sg_setup_one - DMA-map the memory buffer associated with a command.
 *    @qc: Command with memory buffer to be mapped.
 *
 *    DMA-map the memory buffer associated with queued_cmd @qc.
 *
 *    LOCKING:
 *    spin_lock_irqsave(host lock)
 *
 *    RETURNS:
 *    Zero on success, negative on error.
 */

static int ata_sg_setup_one(struct ata_queued_cmd *qc)
{
      struct ata_port *ap = qc->ap;
      int dir = qc->dma_dir;
      struct scatterlist *sg = qc->__sg;
      dma_addr_t dma_address;
      int trim_sg = 0;

      /* we must lengthen transfers to end on a 32-bit boundary */
      qc->pad_len = sg->length & 3;
      if (qc->pad_len) {
            void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
            struct scatterlist *psg = &qc->pad_sgent;

            WARN_ON(qc->dev->class != ATA_DEV_ATAPI);

            memset(pad_buf, 0, ATA_DMA_PAD_SZ);

            if (qc->tf.flags & ATA_TFLAG_WRITE)
                  memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
                         qc->pad_len);

            sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
            sg_dma_len(psg) = ATA_DMA_PAD_SZ;
            /* trim sg */
            sg->length -= qc->pad_len;
            if (sg->length == 0)
                  trim_sg = 1;

            DPRINTK("padding done, sg->length=%u pad_len=%u\n",
                  sg->length, qc->pad_len);
      }

      if (trim_sg) {
            qc->n_elem--;
            goto skip_map;
      }

      dma_address = dma_map_single(ap->dev, qc->buf_virt,
                             sg->length, dir);
      if (dma_mapping_error(dma_address)) {
            /* restore sg */
            sg->length += qc->pad_len;
            return -1;
      }

      sg_dma_address(sg) = dma_address;
      sg_dma_len(sg) = sg->length;

skip_map:
      DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
            qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");

      return 0;
}

/**
 *    ata_sg_setup - DMA-map the scatter-gather table associated with a command.
 *    @qc: Command with scatter-gather table to be mapped.
 *
 *    DMA-map the scatter-gather table associated with queued_cmd @qc.
 *
 *    LOCKING:
 *    spin_lock_irqsave(host lock)
 *
 *    RETURNS:
 *    Zero on success, negative on error.
 *
 */

static int ata_sg_setup(struct ata_queued_cmd *qc)
{
      struct ata_port *ap = qc->ap;
      struct scatterlist *sg = qc->__sg;
      struct scatterlist *lsg = sg_last(qc->__sg, qc->n_elem);
      int n_elem, pre_n_elem, dir, trim_sg = 0;

      VPRINTK("ENTER, ata%u\n", ap->print_id);
      WARN_ON(!(qc->flags & ATA_QCFLAG_SG));

      /* we must lengthen transfers to end on a 32-bit boundary */
      qc->pad_len = lsg->length & 3;
      if (qc->pad_len) {
            void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
            struct scatterlist *psg = &qc->pad_sgent;
            unsigned int offset;

            WARN_ON(qc->dev->class != ATA_DEV_ATAPI);

            memset(pad_buf, 0, ATA_DMA_PAD_SZ);

            /*
             * psg->page/offset are used to copy to-be-written
             * data in this function or read data in ata_sg_clean.
             */
            offset = lsg->offset + lsg->length - qc->pad_len;
            sg_init_table(psg, 1);
            sg_set_page(psg, nth_page(sg_page(lsg), offset >> PAGE_SHIFT),
                        qc->pad_len, offset_in_page(offset));

            if (qc->tf.flags & ATA_TFLAG_WRITE) {
                  void *addr = kmap_atomic(sg_page(psg), KM_IRQ0);
                  memcpy(pad_buf, addr + psg->offset, qc->pad_len);
                  kunmap_atomic(addr, KM_IRQ0);
            }

            sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
            sg_dma_len(psg) = ATA_DMA_PAD_SZ;
            /* trim last sg */
            lsg->length -= qc->pad_len;
            if (lsg->length == 0)
                  trim_sg = 1;

            DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
                  qc->n_elem - 1, lsg->length, qc->pad_len);
      }

      pre_n_elem = qc->n_elem;
      if (trim_sg && pre_n_elem)
            pre_n_elem--;

      if (!pre_n_elem) {
            n_elem = 0;
            goto skip_map;
      }

      dir = qc->dma_dir;
      n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
      if (n_elem < 1) {
            /* restore last sg */
            lsg->length += qc->pad_len;
            return -1;
      }

      DPRINTK("%d sg elements mapped\n", n_elem);

skip_map:
      qc->n_elem = n_elem;

      return 0;
}

/**
 *    swap_buf_le16 - swap halves of 16-bit words in place
 *    @buf:  Buffer to swap
 *    @buf_words:  Number of 16-bit words in buffer.
 *
 *    Swap halves of 16-bit words if needed to convert from
 *    little-endian byte order to native cpu byte order, or
 *    vice-versa.
 *
 *    LOCKING:
 *    Inherited from caller.
 */
void swap_buf_le16(u16 *buf, unsigned int buf_words)
{
#ifdef __BIG_ENDIAN
      unsigned int i;

      for (i = 0; i < buf_words; i++)
            buf[i] = le16_to_cpu(buf[i]);
#endif /* __BIG_ENDIAN */
}

/**
 *    ata_data_xfer - Transfer data by PIO
 *    @adev: device to target
 *    @buf: data buffer
 *    @buflen: buffer length
 *    @write_data: read/write
 *
 *    Transfer data from/to the device data register by PIO.
 *
 *    LOCKING:
 *    Inherited from caller.
 */
void ata_data_xfer(struct ata_device *adev, unsigned char *buf,
               unsigned int buflen, int write_data)
{
      struct ata_port *ap = adev->link->ap;
      unsigned int words = buflen >> 1;

      /* Transfer multiple of 2 bytes */
      if (write_data)
            iowrite16_rep(ap->ioaddr.data_addr, buf, words);
      else
            ioread16_rep(ap->ioaddr.data_addr, buf, words);

      /* Transfer trailing 1 byte, if any. */
      if (unlikely(buflen & 0x01)) {
            u16 align_buf[1] = { 0 };
            unsigned char *trailing_buf = buf + buflen - 1;

            if (write_data) {
                  memcpy(align_buf, trailing_buf, 1);
                  iowrite16(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
            } else {
                  align_buf[0] = cpu_to_le16(ioread16(ap->ioaddr.data_addr));
                  memcpy(trailing_buf, align_buf, 1);
            }
      }
}

/**
 *    ata_data_xfer_noirq - Transfer data by PIO
 *    @adev: device to target
 *    @buf: data buffer
 *    @buflen: buffer length
 *    @write_data: read/write
 *
 *    Transfer data from/to the device data register by PIO. Do the
 *    transfer with interrupts disabled.
 *
 *    LOCKING:
 *    Inherited from caller.
 */
void ata_data_xfer_noirq(struct ata_device *adev, unsigned char *buf,
                   unsigned int buflen, int write_data)
{
      unsigned long flags;
      local_irq_save(flags);
      ata_data_xfer(adev, buf, buflen, write_data);
      local_irq_restore(flags);
}


/**
 *    ata_pio_sector - Transfer a sector of data.
 *    @qc: Command on going
 *
 *    Transfer qc->sect_size bytes of data from/to the ATA device.
 *
 *    LOCKING:
 *    Inherited from caller.
 */

static void ata_pio_sector(struct ata_queued_cmd *qc)
{
      int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
      struct ata_port *ap = qc->ap;
      struct page *page;
      unsigned int offset;
      unsigned char *buf;

      if (qc->curbytes == qc->nbytes - qc->sect_size)
            ap->hsm_task_state = HSM_ST_LAST;

      page = sg_page(qc->cursg);
      offset = qc->cursg->offset + qc->cursg_ofs;

      /* get the current page and offset */
      page = nth_page(page, (offset >> PAGE_SHIFT));
      offset %= PAGE_SIZE;

      DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");

      if (PageHighMem(page)) {
            unsigned long flags;

            /* FIXME: use a bounce buffer */
            local_irq_save(flags);
            buf = kmap_atomic(page, KM_IRQ0);

            /* do the actual data transfer */
            ap->ops->data_xfer(qc->dev, buf + offset, qc->sect_size, do_write);

            kunmap_atomic(buf, KM_IRQ0);
            local_irq_restore(flags);
      } else {
            buf = page_address(page);
            ap->ops->data_xfer(qc->dev, buf + offset, qc->sect_size, do_write);
      }

      qc->curbytes += qc->sect_size;
      qc->cursg_ofs += qc->sect_size;

      if (qc->cursg_ofs == qc->cursg->length) {
            qc->cursg = sg_next(qc->cursg);
            qc->cursg_ofs = 0;
      }
}

/**
 *    ata_pio_sectors - Transfer one or many sectors.
 *    @qc: Command on going
 *
 *    Transfer one or many sectors of data from/to the
 *    ATA device for the DRQ request.
 *
 *    LOCKING:
 *    Inherited from caller.
 */

static void ata_pio_sectors(struct ata_queued_cmd *qc)
{
      if (is_multi_taskfile(&qc->tf)) {
            /* READ/WRITE MULTIPLE */
            unsigned int nsect;

            WARN_ON(qc->dev->multi_count == 0);

            nsect = min((qc->nbytes - qc->curbytes) / qc->sect_size,
                      qc->dev->multi_count);
            while (nsect--)
                  ata_pio_sector(qc);
      } else
            ata_pio_sector(qc);

      ata_altstatus(qc->ap); /* flush */
}

/**
 *    atapi_send_cdb - Write CDB bytes to hardware
 *    @ap: Port to which ATAPI device is attached.
 *    @qc: Taskfile currently active
 *
 *    When device has indicated its readiness to accept
 *    a CDB, this function is called.  Send the CDB.
 *
 *    LOCKING:
 *    caller.
 */

static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
{
      /* send SCSI cdb */
      DPRINTK("send cdb\n");
      WARN_ON(qc->dev->cdb_len < 12);

      ap->ops->data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1);
      ata_altstatus(ap); /* flush */

      switch (qc->tf.protocol) {
      case ATA_PROT_ATAPI:
            ap->hsm_task_state = HSM_ST;
            break;
      case ATA_PROT_ATAPI_NODATA:
            ap->hsm_task_state = HSM_ST_LAST;
            break;
      case ATA_PROT_ATAPI_DMA:
            ap->hsm_task_state = HSM_ST_LAST;
            /* initiate bmdma */
            ap->ops->bmdma_start(qc);
            break;
      }
}

/**
 *    __atapi_pio_bytes - Transfer data from/to the ATAPI device.
 *    @qc: Command on going
 *    @bytes: number of bytes
 *
 *    Transfer Transfer data from/to the ATAPI device.
 *
 *    LOCKING:
 *    Inherited from caller.
 *
 */
static int __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
{
      int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
      struct ata_port *ap = qc->ap;
      struct ata_eh_info *ehi = &qc->dev->link->eh_info;
      struct scatterlist *sg;
      struct page *page;
      unsigned char *buf;
      unsigned int offset, count;

next_sg:
      sg = qc->cursg;
      if (unlikely(!sg)) {
            /*
             * The end of qc->sg is reached and the device expects
             * more data to transfer. In order not to overrun qc->sg
             * and fulfill length specified in the byte count register,
             *    - for read case, discard trailing data from the device
             *    - for write case, padding zero data to the device
             */
            u16 pad_buf[1] = { 0 };
            unsigned int i;

            if (bytes > qc->curbytes - qc->nbytes + ATAPI_MAX_DRAIN) {
                  ata_ehi_push_desc(ehi, "too much trailing data "
                                "buf=%u cur=%u bytes=%u",
                                qc->nbytes, qc->curbytes, bytes);
                  return -1;
            }

             /* overflow is exptected for misc ATAPI commands */
            if (bytes && !atapi_qc_may_overflow(qc))
                  ata_dev_printk(qc->dev, KERN_WARNING, "ATAPI %u bytes "
                               "trailing data (cdb=%02x nbytes=%u)\n",
                               bytes, qc->cdb[0], qc->nbytes);

            for (i = 0; i < (bytes + 1) / 2; i++)
                  ap->ops->data_xfer(qc->dev, (unsigned char *)pad_buf, 2, do_write);

            qc->curbytes += bytes;

            return 0;
      }

      page = sg_page(sg);
      offset = sg->offset + qc->cursg_ofs;

      /* get the current page and offset */
      page = nth_page(page, (offset >> PAGE_SHIFT));
      offset %= PAGE_SIZE;

      /* don't overrun current sg */
      count = min(sg->length - qc->cursg_ofs, bytes);

      /* don't cross page boundaries */
      count = min(count, (unsigned int)PAGE_SIZE - offset);

      DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");

      if (PageHighMem(page)) {
            unsigned long flags;

            /* FIXME: use bounce buffer */
            local_irq_save(flags);
            buf = kmap_atomic(page, KM_IRQ0);

            /* do the actual data transfer */
            ap->ops->data_xfer(qc->dev,  buf + offset, count, do_write);

            kunmap_atomic(buf, KM_IRQ0);
            local_irq_restore(flags);
      } else {
            buf = page_address(page);
            ap->ops->data_xfer(qc->dev,  buf + offset, count, do_write);
      }

      bytes -= count;
      if ((count & 1) && bytes)
            bytes--;
      qc->curbytes += count;
      qc->cursg_ofs += count;

      if (qc->cursg_ofs == sg->length) {
            qc->cursg = sg_next(qc->cursg);
            qc->cursg_ofs = 0;
      }

      if (bytes)
            goto next_sg;

      return 0;
}

/**
 *    atapi_pio_bytes - Transfer data from/to the ATAPI device.
 *    @qc: Command on going
 *
 *    Transfer Transfer data from/to the ATAPI device.
 *
 *    LOCKING:
 *    Inherited from caller.
 */

static void atapi_pio_bytes(struct ata_queued_cmd *qc)
{
      struct ata_port *ap = qc->ap;
      struct ata_device *dev = qc->dev;
      unsigned int ireason, bc_lo, bc_hi, bytes;
      int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;

      /* Abuse qc->result_tf for temp storage of intermediate TF
       * here to save some kernel stack usage.
       * For normal completion, qc->result_tf is not relevant. For
       * error, qc->result_tf is later overwritten by ata_qc_complete().
       * So, the correctness of qc->result_tf is not affected.
       */
      ap->ops->tf_read(ap, &qc->result_tf);
      ireason = qc->result_tf.nsect;
      bc_lo = qc->result_tf.lbam;
      bc_hi = qc->result_tf.lbah;
      bytes = (bc_hi << 8) | bc_lo;

      /* shall be cleared to zero, indicating xfer of data */
      if (ireason & (1 << 0))
            goto err_out;

      /* make sure transfer direction matches expected */
      i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
      if (do_write != i_write)
            goto err_out;

      VPRINTK("ata%u: xfering %d bytes\n", ap->print_id, bytes);

      if (__atapi_pio_bytes(qc, bytes))
            goto err_out;
      ata_altstatus(ap); /* flush */

      return;

err_out:
      ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n");
      qc->err_mask |= AC_ERR_HSM;
      ap->hsm_task_state = HSM_ST_ERR;
}

/**
 *    ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
 *    @ap: the target ata_port
 *    @qc: qc on going
 *
 *    RETURNS:
 *    1 if ok in workqueue, 0 otherwise.
 */

static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc)
{
      if (qc->tf.flags & ATA_TFLAG_POLLING)
            return 1;

      if (ap->hsm_task_state == HSM_ST_FIRST) {
            if (qc->tf.protocol == ATA_PROT_PIO &&
                (qc->tf.flags & ATA_TFLAG_WRITE))
                return 1;

            if (is_atapi_taskfile(&qc->tf) &&
                !(qc->dev->flags & ATA_DFLAG_CDB_INTR))
                  return 1;
      }

      return 0;
}

/**
 *    ata_hsm_qc_complete - finish a qc running on standard HSM
 *    @qc: Command to complete
 *    @in_wq: 1 if called from workqueue, 0 otherwise
 *
 *    Finish @qc which is running on standard HSM.
 *
 *    LOCKING:
 *    If @in_wq is zero, spin_lock_irqsave(host lock).
 *    Otherwise, none on entry and grabs host lock.
 */
static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq)
{
      struct ata_port *ap = qc->ap;
      unsigned long flags;

      if (ap->ops->error_handler) {
            if (in_wq) {
                  spin_lock_irqsave(ap->lock, flags);

                  /* EH might have kicked in while host lock is
                   * released.
                   */
                  qc = ata_qc_from_tag(ap, qc->tag);
                  if (qc) {
                        if (likely(!(qc->err_mask & AC_ERR_HSM))) {
                              ap->ops->irq_on(ap);
                              ata_qc_complete(qc);
                        } else
                              ata_port_freeze(ap);
                  }

                  spin_unlock_irqrestore(ap->lock, flags);
            } else {
                  if (likely(!(qc->err_mask & AC_ERR_HSM)))
                        ata_qc_complete(qc);
                  else
                        ata_port_freeze(ap);
            }
      } else {
            if (in_wq) {
                  spin_lock_irqsave(ap->lock, flags);
                  ap->ops->irq_on(ap);
                  ata_qc_complete(qc);
                  spin_unlock_irqrestore(ap->lock, flags);
            } else
                  ata_qc_complete(qc);
      }
}

/**
 *    ata_hsm_move - move the HSM to the next state.
 *    @ap: the target ata_port
 *    @qc: qc on going
 *    @status: current device status
 *    @in_wq: 1 if called from workqueue, 0 otherwise
 *
 *    RETURNS:
 *    1 when poll next status needed, 0 otherwise.
 */
int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
             u8 status, int in_wq)
{
      unsigned long flags = 0;
      int poll_next;

      WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0);

      /* Make sure ata_qc_issue_prot() does not throw things
       * like DMA polling into the workqueue. Notice that
       * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
       */
      WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc));

fsm_start:
      DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
            ap->print_id, qc->tf.protocol, ap->hsm_task_state, status);

      switch (ap->hsm_task_state) {
      case HSM_ST_FIRST:
            /* Send first data block or PACKET CDB */

            /* If polling, we will stay in the work queue after
             * sending the data. Otherwise, interrupt handler
             * takes over after sending the data.
             */
            poll_next = (qc->tf.flags & ATA_TFLAG_POLLING);

            /* check device status */
            if (unlikely((status & ATA_DRQ) == 0)) {
                  /* handle BSY=0, DRQ=0 as error */
                  if (likely(status & (ATA_ERR | ATA_DF)))
                        /* device stops HSM for abort/error */
                        qc->err_mask |= AC_ERR_DEV;
                  else
                        /* HSM violation. Let EH handle this */
                        qc->err_mask |= AC_ERR_HSM;

                  ap->hsm_task_state = HSM_ST_ERR;
                  goto fsm_start;
            }

            /* Device should not ask for data transfer (DRQ=1)
             * when it finds something wrong.
             * We ignore DRQ here and stop the HSM by
             * changing hsm_task_state to HSM_ST_ERR and
             * let the EH abort the command or reset the device.
             */
            if (unlikely(status & (ATA_ERR | ATA_DF))) {
                  /* Some ATAPI tape drives forget to clear the ERR bit
                   * when doing the next command (mostly request sense).
                   * We ignore ERR here to workaround and proceed sending
                   * the CDB.
                   */
                  if (!(qc->dev->horkage & ATA_HORKAGE_STUCK_ERR)) {
                        ata_port_printk(ap, KERN_WARNING,
                                    "DRQ=1 with device error, "
                                    "dev_stat 0x%X\n", status);
                        qc->err_mask |= AC_ERR_HSM;
                        ap->hsm_task_state = HSM_ST_ERR;
                        goto fsm_start;
                  }
            }

            /* Send the CDB (atapi) or the first data block (ata pio out).
             * During the state transition, interrupt handler shouldn't
             * be invoked before the data transfer is complete and
             * hsm_task_state is changed. Hence, the following locking.
             */
            if (in_wq)
                  spin_lock_irqsave(ap->lock, flags);

            if (qc->tf.protocol == ATA_PROT_PIO) {
                  /* PIO data out protocol.
                   * send first data block.
                   */

                  /* ata_pio_sectors() might change the state
                   * to HSM_ST_LAST. so, the state is changed here
                   * before ata_pio_sectors().
                   */
                  ap->hsm_task_state = HSM_ST;
                  ata_pio_sectors(qc);
            } else
                  /* send CDB */
                  atapi_send_cdb(ap, qc);

            if (in_wq)
                  spin_unlock_irqrestore(ap->lock, flags);

            /* if polling, ata_pio_task() handles the rest.
             * otherwise, interrupt handler takes over from here.
             */
            break;

      case HSM_ST:
            /* complete command or read/write the data register */
            if (qc->tf.protocol == ATA_PROT_ATAPI) {
                  /* ATAPI PIO protocol */
                  if ((status & ATA_DRQ) == 0) {
                        /* No more data to transfer or device error.
                         * Device error will be tagged in HSM_ST_LAST.
                         */
                        ap->hsm_task_state = HSM_ST_LAST;
                        goto fsm_start;
                  }

                  /* Device should not ask for data transfer (DRQ=1)
                   * when it finds something wrong.
                   * We ignore DRQ here and stop the HSM by
                   * changing hsm_task_state to HSM_ST_ERR and
                   * let the EH abort the command or reset the device.
                   */
                  if (unlikely(status & (ATA_ERR | ATA_DF))) {
                        ata_port_printk(ap, KERN_WARNING, "DRQ=1 with "
                                    "device error, dev_stat 0x%X\n",
                                    status);
                        qc->err_mask |= AC_ERR_HSM;
                        ap->hsm_task_state = HSM_ST_ERR;
                        goto fsm_start;
                  }

                  atapi_pio_bytes(qc);

                  if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
                        /* bad ireason reported by device */
                        goto fsm_start;

            } else {
                  /* ATA PIO protocol */
                  if (unlikely((status & ATA_DRQ) == 0)) {
                        /* handle BSY=0, DRQ=0 as error */
                        if (likely(status & (ATA_ERR | ATA_DF)))
                              /* device stops HSM for abort/error */
                              qc->err_mask |= AC_ERR_DEV;
                        else
                              /* HSM violation. Let EH handle this.
                               * Phantom devices also trigger this
                               * condition.  Mark hint.
                               */
                              qc->err_mask |= AC_ERR_HSM |
                                          AC_ERR_NODEV_HINT;

                        ap->hsm_task_state = HSM_ST_ERR;
                        goto fsm_start;
                  }

                  /* For PIO reads, some devices may ask for
                   * data transfer (DRQ=1) alone with ERR=1.
                   * We respect DRQ here and transfer one
                   * block of junk data before changing the
                   * hsm_task_state to HSM_ST_ERR.
                   *
                   * For PIO writes, ERR=1 DRQ=1 doesn't make
                   * sense since the data block has been
                   * transferred to the device.
                   */
                  if (unlikely(status & (ATA_ERR | ATA_DF))) {
                        /* data might be corrputed */
                        qc->err_mask |= AC_ERR_DEV;

                        if (!(qc->tf.flags & ATA_TFLAG_WRITE)) {
                              ata_pio_sectors(qc);
                              status = ata_wait_idle(ap);
                        }

                        if (status & (ATA_BUSY | ATA_DRQ))
                              qc->err_mask |= AC_ERR_HSM;

                        /* ata_pio_sectors() might change the
                         * state to HSM_ST_LAST. so, the state
                         * is changed after ata_pio_sectors().
                         */
                        ap->hsm_task_state = HSM_ST_ERR;
                        goto fsm_start;
                  }

                  ata_pio_sectors(qc);

                  if (ap->hsm_task_state == HSM_ST_LAST &&
                      (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
                        /* all data read */
                        status = ata_wait_idle(ap);
                        goto fsm_start;
                  }
            }

            poll_next = 1;
            break;

      case HSM_ST_LAST:
            if (unlikely(!ata_ok(status))) {
                  qc->err_mask |= __ac_err_mask(status);
                  ap->hsm_task_state = HSM_ST_ERR;
                  goto fsm_start;
            }

            /* no more data to transfer */
            DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
                  ap->print_id, qc->dev->devno, status);

            WARN_ON(qc->err_mask);

            ap->hsm_task_state = HSM_ST_IDLE;

            /* complete taskfile transaction */
            ata_hsm_qc_complete(qc, in_wq);

            poll_next = 0;
            break;

      case HSM_ST_ERR:
            /* make sure qc->err_mask is available to
             * know what's wrong and recover
             */
            WARN_ON(qc->err_mask == 0);

            ap->hsm_task_state = HSM_ST_IDLE;

            /* complete taskfile transaction */
            ata_hsm_qc_complete(qc, in_wq);

            poll_next = 0;
            break;
      default:
            poll_next = 0;
            BUG();
      }

      return poll_next;
}

static void ata_pio_task(struct work_struct *work)
{
      struct ata_port *ap =
            container_of(work, struct ata_port, port_task.work);
      struct ata_queued_cmd *qc = ap->port_task_data;
      u8 status;
      int poll_next;

fsm_start:
      WARN_ON(ap->hsm_task_state == HSM_ST_IDLE);

      /*
       * This is purely heuristic.  This is a fast path.
       * Sometimes when we enter, BSY will be cleared in
       * a chk-status or two.  If not, the drive is probably seeking
       * or something.  Snooze for a couple msecs, then
       * chk-status again.  If still busy, queue delayed work.
       */
      status = ata_busy_wait(ap, ATA_BUSY, 5);
      if (status & ATA_BUSY) {
            msleep(2);
            status = ata_busy_wait(ap, ATA_BUSY, 10);
            if (status & ATA_BUSY) {
                  ata_port_queue_task(ap, ata_pio_task, qc, ATA_SHORT_PAUSE);
                  return;
            }
      }

      /* move the HSM */
      poll_next = ata_hsm_move(ap, qc, status, 1);

      /* another command or interrupt handler
       * may be running at this point.
       */
      if (poll_next)
            goto fsm_start;
}

/**
 *    ata_qc_new - Request an available ATA command, for queueing
 *    @ap: Port associated with device @dev
 *    @dev: Device from whom we request an available command structure
 *
 *    LOCKING:
 *    None.
 */

static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
{
      struct ata_queued_cmd *qc = NULL;
      unsigned int i;

      /* no command while frozen */
      if (unlikely(ap->pflags & ATA_PFLAG_FROZEN))
            return NULL;

      /* the last tag is reserved for internal command. */
      for (i = 0; i < ATA_MAX_QUEUE - 1; i++)
            if (!test_and_set_bit(i, &ap->qc_allocated)) {
                  qc = __ata_qc_from_tag(ap, i);
                  break;
            }

      if (qc)
            qc->tag = i;

      return qc;
}

/**
 *    ata_qc_new_init - Request an available ATA command, and initialize it
 *    @dev: Device from whom we request an available command structure
 *
 *    LOCKING:
 *    None.
 */

struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev)
{
      struct ata_port *ap = dev->link->ap;
      struct ata_queued_cmd *qc;

      qc = ata_qc_new(ap);
      if (qc) {
            qc->scsicmd = NULL;
            qc->ap = ap;
            qc->dev = dev;

            ata_qc_reinit(qc);
      }

      return qc;
}

/**
 *    ata_qc_free - free unused ata_queued_cmd
 *    @qc: Command to complete
 *
 *    Designed to free unused ata_queued_cmd object
 *    in case something prevents using it.
 *
 *    LOCKING:
 *    spin_lock_irqsave(host lock)
 */
void ata_qc_free(struct ata_queued_cmd *qc)
{
      struct ata_port *ap = qc->ap;
      unsigned int tag;

      WARN_ON(qc == NULL);    /* ata_qc_from_tag _might_ return NULL */

      qc->flags = 0;
      tag = qc->tag;
      if (likely(ata_tag_valid(tag))) {
            qc->tag = ATA_TAG_POISON;
            clear_bit(tag, &ap->qc_allocated);
      }
}

void __ata_qc_complete(struct ata_queued_cmd *qc)
{
      struct ata_port *ap = qc->ap;
      struct ata_link *link = qc->dev->link;

      WARN_ON(qc == NULL);    /* ata_qc_from_tag _might_ return NULL */
      WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));

      if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
            ata_sg_clean(qc);

      /* command should be marked inactive atomically with qc completion */
      if (qc->tf.protocol == ATA_PROT_NCQ) {
            link->sactive &= ~(1 << qc->tag);
            if (!link->sactive)
                  ap->nr_active_links--;
      } else {
            link->active_tag = ATA_TAG_POISON;
            ap->nr_active_links--;
      }

      /* clear exclusive status */
      if (unlikely(qc->flags & ATA_QCFLAG_CLEAR_EXCL &&
                 ap->excl_link == link))
            ap->excl_link = NULL;

      /* atapi: mark qc as inactive to prevent the interrupt handler
       * from completing the command twice later, before the error handler
       * is called. (when rc != 0 and atapi request sense is needed)
       */
      qc->flags &= ~ATA_QCFLAG_ACTIVE;
      ap->qc_active &= ~(1 << qc->tag);

      /* call completion callback */
      qc->complete_fn(qc);
}

static void fill_result_tf(struct ata_queued_cmd *qc)
{
      struct ata_port *ap = qc->ap;

      qc->result_tf.flags = qc->tf.flags;
      ap->ops->tf_read(ap, &qc->result_tf);
}

/**
 *    ata_qc_complete - Complete an active ATA command
 *    @qc: Command to complete
 *    @err_mask: ATA Status register contents
 *
 *    Indicate to the mid and upper layers that an ATA
 *    command has completed, with either an ok or not-ok status.
 *
 *    LOCKING:
 *    spin_lock_irqsave(host lock)
 */
void ata_qc_complete(struct ata_queued_cmd *qc)
{
      struct ata_port *ap = qc->ap;

      /* XXX: New EH and old EH use different mechanisms to
       * synchronize EH with regular execution path.
       *
       * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED.
       * Normal execution path is responsible for not accessing a
       * failed qc.  libata core enforces the rule by returning NULL
       * from ata_qc_from_tag() for failed qcs.
       *
       * Old EH depends on ata_qc_complete() nullifying completion
       * requests if ATA_QCFLAG_EH_SCHEDULED is set.  Old EH does
       * not synchronize with interrupt handler.  Only PIO task is
       * taken care of.
       */
      if (ap->ops->error_handler) {
            struct ata_device *dev = qc->dev;
            struct ata_eh_info *ehi = &dev->link->eh_info;

            WARN_ON(ap->pflags & ATA_PFLAG_FROZEN);

            if (unlikely(qc->err_mask))
                  qc->flags |= ATA_QCFLAG_FAILED;

            if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) {
                  if (!ata_tag_internal(qc->tag)) {
                        /* always fill result TF for failed qc */
                        fill_result_tf(qc);
                        ata_qc_schedule_eh(qc);
                        return;
                  }
            }

            /* read result TF if requested */
            if (qc->flags & ATA_QCFLAG_RESULT_TF)
                  fill_result_tf(qc);

            /* Some commands need post-processing after successful
             * completion.
             */
            switch (qc->tf.command) {
            case ATA_CMD_SET_FEATURES:
                  if (qc->tf.feature != SETFEATURES_WC_ON &&
                      qc->tf.feature != SETFEATURES_WC_OFF)
                        break;
                  /* fall through */
            case ATA_CMD_INIT_DEV_PARAMS: /* CHS translation changed */
            case ATA_CMD_SET_MULTI: /* multi_count changed */
                  /* revalidate device */
                  ehi->dev_action[dev->devno] |= ATA_EH_REVALIDATE;
                  ata_port_schedule_eh(ap);
                  break;

            case ATA_CMD_SLEEP:
                  dev->flags |= ATA_DFLAG_SLEEPING;
                  break;
            }

            __ata_qc_complete(qc);
      } else {
            if (qc->flags & ATA_QCFLAG_EH_SCHEDULED)
                  return;

            /* read result TF if failed or requested */
            if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF)
                  fill_result_tf(qc);

            __ata_qc_complete(qc);
      }
}

/**
 *    ata_qc_complete_multiple - Complete multiple qcs successfully
 *    @ap: port in question
 *    @qc_active: new qc_active mask
 *    @finish_qc: LLDD callback invoked before completing a qc
 *
 *    Complete in-flight commands.  This functions is meant to be
 *    called from low-level driver's interrupt routine to complete
 *    requests normally.  ap->qc_active and @qc_active is compared
 *    and commands are completed accordingly.
 *
 *    LOCKING:
 *    spin_lock_irqsave(host lock)
 *
 *    RETURNS:
 *    Number of completed commands on success, -errno otherwise.
 */
int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active,
                       void (*finish_qc)(struct ata_queued_cmd *))
{
      int nr_done = 0;
      u32 done_mask;
      int i;

      done_mask = ap->qc_active ^ qc_active;

      if (unlikely(done_mask & qc_active)) {
            ata_port_printk(ap, KERN_ERR, "illegal qc_active transition "
                        "(%08x->%08x)\n", ap->qc_active, qc_active);
            return -EINVAL;
      }

      for (i = 0; i < ATA_MAX_QUEUE; i++) {
            struct ata_queued_cmd *qc;

            if (!(done_mask & (1 << i)))
                  continue;

            if ((qc = ata_qc_from_tag(ap, i))) {
                  if (finish_qc)
                        finish_qc(qc);
                  ata_qc_complete(qc);
                  nr_done++;
            }
      }

      return nr_done;
}

static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
{
      struct ata_port *ap = qc->ap;

      switch (qc->tf.protocol) {
      case ATA_PROT_NCQ:
      case ATA_PROT_DMA:
      case ATA_PROT_ATAPI_DMA:
            return 1;

      case ATA_PROT_ATAPI:
      case ATA_PROT_PIO:
            if (ap->flags & ATA_FLAG_PIO_DMA)
                  return 1;

            /* fall through */

      default:
            return 0;
      }

      /* never reached */
}

/**
 *    ata_qc_issue - issue taskfile to device
 *    @qc: command to issue to device
 *
 *    Prepare an ATA command to submission to device.
 *    This includes mapping the data into a DMA-able
 *    area, filling in the S/G table, and finally
 *    writing the taskfile to hardware, starting the command.
 *
 *    LOCKING:
 *    spin_lock_irqsave(host lock)
 */
void ata_qc_issue(struct ata_queued_cmd *qc)
{
      struct ata_port *ap = qc->ap;
      struct ata_link *link = qc->dev->link;

      /* Make sure only one non-NCQ command is outstanding.  The
       * check is skipped for old EH because it reuses active qc to
       * request ATAPI sense.
       */
      WARN_ON(ap->ops->error_handler && ata_tag_valid(link->active_tag));

      if (qc->tf.protocol == ATA_PROT_NCQ) {
            WARN_ON(link->sactive & (1 << qc->tag));

            if (!link->sactive)
                  ap->nr_active_links++;
            link->sactive |= 1 << qc->tag;
      } else {
            WARN_ON(link->sactive);

            ap->nr_active_links++;
            link->active_tag = qc->tag;
      }

      qc->flags |= ATA_QCFLAG_ACTIVE;
      ap->qc_active |= 1 << qc->tag;

      if (ata_should_dma_map(qc)) {
            if (qc->flags & ATA_QCFLAG_SG) {
                  if (ata_sg_setup(qc))
                        goto sg_err;
            } else if (qc->flags & ATA_QCFLAG_SINGLE) {
                  if (ata_sg_setup_one(qc))
                        goto sg_err;
            }
      } else {
            qc->flags &= ~ATA_QCFLAG_DMAMAP;
      }

      /* if device is sleeping, schedule softreset and abort the link */
      if (unlikely(qc->dev->flags & ATA_DFLAG_SLEEPING)) {
            link->eh_info.action |= ATA_EH_SOFTRESET;
            ata_ehi_push_desc(&link->eh_info, "waking up from sleep");
            ata_link_abort(link);
            return;
      }

      ap->ops->qc_prep(qc);

      qc->err_mask |= ap->ops->qc_issue(qc);
      if (unlikely(qc->err_mask))
            goto err;
      return;

sg_err:
      qc->flags &= ~ATA_QCFLAG_DMAMAP;
      qc->err_mask |= AC_ERR_SYSTEM;
err:
      ata_qc_complete(qc);
}

/**
 *    ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
 *    @qc: command to issue to device
 *
 *    Using various libata functions and hooks, this function
 *    starts an ATA command.  ATA commands are grouped into
 *    classes called "protocols", and issuing each type of protocol
 *    is slightly different.
 *
 *    May be used as the qc_issue() entry in ata_port_operations.
 *
 *    LOCKING:
 *    spin_lock_irqsave(host lock)
 *
 *    RETURNS:
 *    Zero on success, AC_ERR_* mask on failure
 */

unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
{
      struct ata_port *ap = qc->ap;

      /* Use polling pio if the LLD doesn't handle
       * interrupt driven pio and atapi CDB interrupt.
       */
      if (ap->flags & ATA_FLAG_PIO_POLLING) {
            switch (qc->tf.protocol) {
            case ATA_PROT_PIO:
            case ATA_PROT_NODATA:
            case ATA_PROT_ATAPI:
            case ATA_PROT_ATAPI_NODATA:
                  qc->tf.flags |= ATA_TFLAG_POLLING;
                  break;
            case ATA_PROT_ATAPI_DMA:
                  if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
                        /* see ata_dma_blacklisted() */
                        BUG();
                  break;
            default:
                  break;
            }
      }

      /* select the device */
      ata_dev_select(ap, qc->dev->devno, 1, 0);

      /* start the command */
      switch (qc->tf.protocol) {
      case ATA_PROT_NODATA:
            if (qc->tf.flags & ATA_TFLAG_POLLING)
                  ata_qc_set_polling(qc);

            ata_tf_to_host(ap, &qc->tf);
            ap->hsm_task_state = HSM_ST_LAST;

            if (qc->tf.flags & ATA_TFLAG_POLLING)
                  ata_port_queue_task(ap, ata_pio_task, qc, 0);

            break;

      case ATA_PROT_DMA:
            WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);

            ap->ops->tf_load(ap, &qc->tf);       /* load tf registers */
            ap->ops->bmdma_setup(qc);         /* set up bmdma */
            ap->ops->bmdma_start(qc);         /* initiate bmdma */
            ap->hsm_task_state = HSM_ST_LAST;
            break;

      case ATA_PROT_PIO:
            if (qc->tf.flags & ATA_TFLAG_POLLING)
                  ata_qc_set_polling(qc);

            ata_tf_to_host(ap, &qc->tf);

            if (qc->tf.flags & ATA_TFLAG_WRITE) {
                  /* PIO data out protocol */
                  ap->hsm_task_state = HSM_ST_FIRST;
                  ata_port_queue_task(ap, ata_pio_task, qc, 0);

                  /* always send first data block using
                   * the ata_pio_task() codepath.
                   */
            } else {
                  /* PIO data in protocol */
                  ap->hsm_task_state = HSM_ST;

                  if (qc->tf.flags & ATA_TFLAG_POLLING)
                        ata_port_queue_task(ap, ata_pio_task, qc, 0);

                  /* if polling, ata_pio_task() handles the rest.
                   * otherwise, interrupt handler takes over from here.
                   */
            }

            break;

      case ATA_PROT_ATAPI:
      case ATA_PROT_ATAPI_NODATA:
            if (qc->tf.flags & ATA_TFLAG_POLLING)
                  ata_qc_set_polling(qc);

            ata_tf_to_host(ap, &qc->tf);

            ap->hsm_task_state = HSM_ST_FIRST;

            /* send cdb by polling if no cdb interrupt */
            if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
                (qc->tf.flags & ATA_TFLAG_POLLING))
                  ata_port_queue_task(ap, ata_pio_task, qc, 0);
            break;

      case ATA_PROT_ATAPI_DMA:
            WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);

            ap->ops->tf_load(ap, &qc->tf);       /* load tf registers */
            ap->ops->bmdma_setup(qc);         /* set up bmdma */
            ap->hsm_task_state = HSM_ST_FIRST;

            /* send cdb by polling if no cdb interrupt */
            if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
                  ata_port_queue_task(ap, ata_pio_task, qc, 0);
            break;

      default:
            WARN_ON(1);
            return AC_ERR_SYSTEM;
      }

      return 0;
}

/**
 *    ata_host_intr - Handle host interrupt for given (port, task)
 *    @ap: Port on which interrupt arrived (possibly...)
 *    @qc: Taskfile currently active in engine
 *
 *    Handle host interrupt for given queued command.  Currently,
 *    only DMA interrupts are handled.  All other commands are
 *    handled via polling with interrupts disabled (nIEN bit).
 *
 *    LOCKING:
 *    spin_lock_irqsave(host lock)
 *
 *    RETURNS:
 *    One if interrupt was handled, zero if not (shared irq).
 */

inline unsigned int ata_host_intr(struct ata_port *ap,
                          struct ata_queued_cmd *qc)
{
      struct ata_eh_info *ehi = &ap->link.eh_info;
      u8 status, host_stat = 0;

      VPRINTK("ata%u: protocol %d task_state %d\n",
            ap->print_id, qc->tf.protocol, ap->hsm_task_state);

      /* Check whether we are expecting interrupt in this state */
      switch (ap->hsm_task_state) {
      case HSM_ST_FIRST:
            /* Some pre-ATAPI-4 devices assert INTRQ
             * at this state when ready to receive CDB.
             */

            /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
             * The flag was turned on only for atapi devices.
             * No need to check is_atapi_taskfile(&qc->tf) again.
             */
            if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
                  goto idle_irq;
            break;
      case HSM_ST_LAST:
            if (qc->tf.protocol == ATA_PROT_DMA ||
                qc->tf.protocol == ATA_PROT_ATAPI_DMA) {
                  /* check status of DMA engine */
                  host_stat = ap->ops->bmdma_status(ap);
                  VPRINTK("ata%u: host_stat 0x%X\n",
                        ap->print_id, host_stat);

                  /* if it's not our irq... */
                  if (!(host_stat & ATA_DMA_INTR))
                        goto idle_irq;

                  /* before we do anything else, clear DMA-Start bit */
                  ap->ops->bmdma_stop(qc);

                  if (unlikely(host_stat & ATA_DMA_ERR)) {
                        /* error when transfering data to/from memory */
                        qc->err_mask |= AC_ERR_HOST_BUS;
                        ap->hsm_task_state = HSM_ST_ERR;
                  }
            }
            break;
      case HSM_ST:
            break;
      default:
            goto idle_irq;
      }

      /* check altstatus */
      status = ata_altstatus(ap);
      if (status & ATA_BUSY)
            goto idle_irq;

      /* check main status, clearing INTRQ */
      status = ata_chk_status(ap);
      if (unlikely(status & ATA_BUSY))
            goto idle_irq;

      /* ack bmdma irq events */
      ap->ops->irq_clear(ap);

      ata_hsm_move(ap, qc, status, 0);

      if (unlikely(qc->err_mask) && (qc->tf.protocol == ATA_PROT_DMA ||
                               qc->tf.protocol == ATA_PROT_ATAPI_DMA))
            ata_ehi_push_desc(ehi, "BMDMA stat 0x%x", host_stat);

      return 1;   /* irq handled */

idle_irq:
      ap->stats.idle_irq++;

#ifdef ATA_IRQ_TRAP
      if ((ap->stats.idle_irq % 1000) == 0) {
            ata_chk_status(ap);
            ap->ops->irq_clear(ap);
            ata_port_printk(ap, KERN_WARNING, "irq trap\n");
            return 1;
      }
#endif
      return 0;   /* irq not handled */
}

/**
 *    ata_interrupt - Default ATA host interrupt handler
 *    @irq: irq line (unused)
 *    @dev_instance: pointer to our ata_host information structure
 *
 *    Default interrupt handler for PCI IDE devices.  Calls
 *    ata_host_intr() for each port that is not disabled.
 *
 *    LOCKING:
 *    Obtains host lock during operation.
 *
 *    RETURNS:
 *    IRQ_NONE or IRQ_HANDLED.
 */

irqreturn_t ata_interrupt(int irq, void *dev_instance)
{
      struct ata_host *host = dev_instance;
      unsigned int i;
      unsigned int handled = 0;
      unsigned long flags;

      /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
      spin_lock_irqsave(&host->lock, flags);

      for (i = 0; i < host->n_ports; i++) {
            struct ata_port *ap;

            ap = host->ports[i];
            if (ap &&
                !(ap->flags & ATA_FLAG_DISABLED)) {
                  struct ata_queued_cmd *qc;

                  qc = ata_qc_from_tag(ap, ap->link.active_tag);
                  if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
                      (qc->flags & ATA_QCFLAG_ACTIVE))
                        handled |= ata_host_intr(ap, qc);
            }
      }

      spin_unlock_irqrestore(&host->lock, flags);

      return IRQ_RETVAL(handled);
}

/**
 *    sata_scr_valid - test whether SCRs are accessible
 *    @link: ATA link to test SCR accessibility for
 *
 *    Test whether SCRs are accessible for @link.
 *
 *    LOCKING:
 *    None.
 *
 *    RETURNS:
 *    1 if SCRs are accessible, 0 otherwise.
 */
int sata_scr_valid(struct ata_link *link)
{
      struct ata_port *ap = link->ap;

      return (ap->flags & ATA_FLAG_SATA) && ap->ops->scr_read;
}

/**
 *    sata_scr_read - read SCR register of the specified port
 *    @link: ATA link to read SCR for
 *    @reg: SCR to read
 *    @val: Place to store read value
 *
 *    Read SCR register @reg of @link into *@val.  This function is
 *    guaranteed to succeed if @link is ap->link, the cable type of
 *    the port is SATA and the port implements ->scr_read.
 *
 *    LOCKING:
 *    None if @link is ap->link.  Kernel thread context otherwise.
 *
 *    RETURNS:
 *    0 on success, negative errno on failure.
 */
int sata_scr_read(struct ata_link *link, int reg, u32 *val)
{
      if (ata_is_host_link(link)) {
            struct ata_port *ap = link->ap;

            if (sata_scr_valid(link))
                  return ap->ops->scr_read(ap, reg, val);
            return -EOPNOTSUPP;
      }

      return sata_pmp_scr_read(link, reg, val);
}

/**
 *    sata_scr_write - write SCR register of the specified port
 *    @link: ATA link to write SCR for
 *    @reg: SCR to write
 *    @val: value to write
 *
 *    Write @val to SCR register @reg of @link.  This function is
 *    guaranteed to succeed if @link is ap->link, the cable type of
 *    the port is SATA and the port implements ->scr_read.
 *
 *    LOCKING:
 *    None if @link is ap->link.  Kernel thread context otherwise.
 *
 *    RETURNS:
 *    0 on success, negative errno on failure.
 */
int sata_scr_write(struct ata_link *link, int reg, u32 val)
{
      if (ata_is_host_link(link)) {
            struct ata_port *ap = link->ap;

            if (sata_scr_valid(link))
                  return ap->ops->scr_write(ap, reg, val);
            return -EOPNOTSUPP;
      }

      return sata_pmp_scr_write(link, reg, val);
}

/**
 *    sata_scr_write_flush - write SCR register of the specified port and flush
 *    @link: ATA link to write SCR for
 *    @reg: SCR to write
 *    @val: value to write
 *
 *    This function is identical to sata_scr_write() except that this
 *    function performs flush after writing to the register.
 *
 *    LOCKING:
 *    None if @link is ap->link.  Kernel thread context otherwise.
 *
 *    RETURNS:
 *    0 on success, negative errno on failure.
 */
int sata_scr_write_flush(struct ata_link *link, int reg, u32 val)
{
      if (ata_is_host_link(link)) {
            struct ata_port *ap = link->ap;
            int rc;

            if (sata_scr_valid(link)) {
                  rc = ap->ops->scr_write(ap, reg, val);
                  if (rc == 0)
                        rc = ap->ops->scr_read(ap, reg, &val);
                  return rc;
            }
            return -EOPNOTSUPP;
      }

      return sata_pmp_scr_write(link, reg, val);
}

/**
 *    ata_link_online - test whether the given link is online
 *    @link: ATA link to test
 *
 *    Test whether @link is online.  Note that this function returns
 *    0 if online status of @link cannot be obtained, so
 *    ata_link_online(link) != !ata_link_offline(link).
 *
 *    LOCKING:
 *    None.
 *
 *    RETURNS:
 *    1 if the port online status is available and online.
 */
int ata_link_online(struct ata_link *link)
{
      u32 sstatus;

      if (sata_scr_read(link, SCR_STATUS, &sstatus) == 0 &&
          (sstatus & 0xf) == 0x3)
            return 1;
      return 0;
}

/**
 *    ata_link_offline - test whether the given link is offline
 *    @link: ATA link to test
 *
 *    Test whether @link is offline.  Note that this function
 *    returns 0 if offline status of @link cannot be obtained, so
 *    ata_link_online(link) != !ata_link_offline(link).
 *
 *    LOCKING:
 *    None.
 *
 *    RETURNS:
 *    1 if the port offline status is available and offline.
 */
int ata_link_offline(struct ata_link *link)
{
      u32 sstatus;

      if (sata_scr_read(link, SCR_STATUS, &sstatus) == 0 &&
          (sstatus & 0xf) != 0x3)
            return 1;
      return 0;
}

int ata_flush_cache(struct ata_device *dev)
{
      unsigned int err_mask;
      u8 cmd;

      if (!ata_try_flush_cache(dev))
            return 0;

      if (dev->flags & ATA_DFLAG_FLUSH_EXT)
            cmd = ATA_CMD_FLUSH_EXT;
      else
            cmd = ATA_CMD_FLUSH;

      /* This is wrong. On a failed flush we get back the LBA of the lost
         sector and we should (assuming it wasn't aborted as unknown) issue
         a further flush command to continue the writeback until it
         does not error */
      err_mask = ata_do_simple_cmd(dev, cmd);
      if (err_mask) {
            ata_dev_printk(dev, KERN_ERR, "failed to flush cache\n");
            return -EIO;
      }

      return 0;
}

#ifdef CONFIG_PM
static int ata_host_request_pm(struct ata_host *host, pm_message_t mesg,
                         unsigned int action, unsigned int ehi_flags,
                         int wait)
{
      unsigned long flags;
      int i, rc;

      for (i = 0; i < host->n_ports; i++) {
            struct ata_port *ap = host->ports[i];
            struct ata_link *link;

            /* Previous resume operation might still be in
             * progress.  Wait for PM_PENDING to clear.
             */
            if (ap->pflags & ATA_PFLAG_PM_PENDING) {
                  ata_port_wait_eh(ap);
                  WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
            }

            /* request PM ops to EH */
            spin_lock_irqsave(ap->lock, flags);

            ap->pm_mesg = mesg;
            if (wait) {
                  rc = 0;
                  ap->pm_result = &rc;
            }

            ap->pflags |= ATA_PFLAG_PM_PENDING;
            __ata_port_for_each_link(link, ap) {
                  link->eh_info.action |= action;
                  link->eh_info.flags |= ehi_flags;
            }

            ata_port_schedule_eh(ap);

            spin_unlock_irqrestore(ap->lock, flags);

            /* wait and check result */
            if (wait) {
                  ata_port_wait_eh(ap);
                  WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
                  if (rc)
                        return rc;
            }
      }

      return 0;
}

/**
 *    ata_host_suspend - suspend host
 *    @host: host to suspend
 *    @mesg: PM message
 *
 *    Suspend @host.  Actual operation is performed by EH.  This
 *    function requests EH to perform PM operations and waits for EH
 *    to finish.
 *
 *    LOCKING:
 *    Kernel thread context (may sleep).
 *
 *    RETURNS:
 *    0 on success, -errno on failure.
 */
int ata_host_suspend(struct ata_host *host, pm_message_t mesg)
{
      int rc;

      /*
       * disable link pm on all ports before requesting
       * any pm activity
       */
      ata_lpm_enable(host);

      rc = ata_host_request_pm(host, mesg, 0, ATA_EHI_QUIET, 1);
      if (rc == 0)
            host->dev->power.power_state = mesg;
      return rc;
}

/**
 *    ata_host_resume - resume host
 *    @host: host to resume
 *
 *    Resume @host.  Actual operation is performed by EH.  This
 *    function requests EH to perform PM operations and returns.
 *    Note that all resume operations are performed parallely.
 *
 *    LOCKING:
 *    Kernel thread context (may sleep).
 */
void ata_host_resume(struct ata_host *host)
{
      ata_host_request_pm(host, PMSG_ON, ATA_EH_SOFTRESET,
                      ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET, 0);
      host->dev->power.power_state = PMSG_ON;

      /* reenable link pm */
      ata_lpm_disable(host);
}
#endif

/**
 *    ata_port_start - Set port up for dma.
 *    @ap: Port to initialize
 *
 *    Called just after data structures for each port are
 *    initialized.  Allocates space for PRD table.
 *
 *    May be used as the port_start() entry in ata_port_operations.
 *
 *    LOCKING:
 *    Inherited from caller.
 */
int ata_port_start(struct ata_port *ap)
{
      struct device *dev = ap->dev;
      int rc;

      ap->prd = dmam_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma,
                              GFP_KERNEL);
      if (!ap->prd)
            return -ENOMEM;

      rc = ata_pad_alloc(ap, dev);
      if (rc)
            return rc;

      DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd,
            (unsigned long long)ap->prd_dma);
      return 0;
}

/**
 *    ata_dev_init - Initialize an ata_device structure
 *    @dev: Device structure to initialize
 *
 *    Initialize @dev in preparation for probing.
 *
 *    LOCKING:
 *    Inherited from caller.
 */
void ata_dev_init(struct ata_device *dev)
{
      struct ata_link *link = dev->link;
      struct ata_port *ap = link->ap;
      unsigned long flags;

      /* SATA spd limit is bound to the first device */
      link->sata_spd_limit = link->hw_sata_spd_limit;
      link->sata_spd = 0;

      /* High bits of dev->flags are used to record warm plug
       * requests which occur asynchronously.  Synchronize using
       * host lock.
       */
      spin_lock_irqsave(ap->lock, flags);
      dev->flags &= ~ATA_DFLAG_INIT_MASK;
      dev->horkage = 0;
      spin_unlock_irqrestore(ap->lock, flags);

      memset((void *)dev + ATA_DEVICE_CLEAR_OFFSET, 0,
             sizeof(*dev) - ATA_DEVICE_CLEAR_OFFSET);
      dev->pio_mask = UINT_MAX;
      dev->mwdma_mask = UINT_MAX;
      dev->udma_mask = UINT_MAX;
}

/**
 *    ata_link_init - Initialize an ata_link structure
 *    @ap: ATA port link is attached to
 *    @link: Link structure to initialize
 *    @pmp: Port multiplier port number
 *
 *    Initialize @link.
 *
 *    LOCKING:
 *    Kernel thread context (may sleep)
 */
void ata_link_init(struct ata_port *ap, struct ata_link *link, int pmp)
{
      int i;

      /* clear everything except for devices */
      memset(link, 0, offsetof(struct ata_link, device[0]));

      link->ap = ap;
      link->pmp = pmp;
      link->active_tag = ATA_TAG_POISON;
      link->hw_sata_spd_limit = UINT_MAX;

      /* can't use iterator, ap isn't initialized yet */
      for (i = 0; i < ATA_MAX_DEVICES; i++) {
            struct ata_device *dev = &link->device[i];

            dev->link = link;
            dev->devno = dev - link->device;
            ata_dev_init(dev);
      }
}

/**
 *    sata_link_init_spd - Initialize link->sata_spd_limit
 *    @link: Link to configure sata_spd_limit for
 *
 *    Initialize @link->[hw_]sata_spd_limit to the currently
 *    configured value.
 *
 *    LOCKING:
 *    Kernel thread context (may sleep).
 *
 *    RETURNS:
 *    0 on success, -errno on failure.
 */
int sata_link_init_spd(struct ata_link *link)
{
      u32 scontrol, spd;
      int rc;

      rc = sata_scr_read(link, SCR_CONTROL, &scontrol);
      if (rc)
            return rc;

      spd = (scontrol >> 4) & 0xf;
      if (spd)
            link->hw_sata_spd_limit &= (1 << spd) - 1;

      link->sata_spd_limit = link->hw_sata_spd_limit;

      return 0;
}

/**
 *    ata_port_alloc - allocate and initialize basic ATA port resources
 *    @host: ATA host this allocated port belongs to
 *
 *    Allocate and initialize basic ATA port resources.
 *
 *    RETURNS:
 *    Allocate ATA port on success, NULL on failure.
 *
 *    LOCKING:
 *    Inherited from calling layer (may sleep).
 */
struct ata_port *ata_port_alloc(struct ata_host *host)
{
      struct ata_port *ap;

      DPRINTK("ENTER\n");

      ap = kzalloc(sizeof(*ap), GFP_KERNEL);
      if (!ap)
            return NULL;

      ap->pflags |= ATA_PFLAG_INITIALIZING;
      ap->lock = &host->lock;
      ap->flags = ATA_FLAG_DISABLED;
      ap->print_id = -1;
      ap->ctl = ATA_DEVCTL_OBS;
      ap->host = host;
      ap->dev = host->dev;
      ap->last_ctl = 0xFF;

#if defined(ATA_VERBOSE_DEBUG)
      /* turn on all debugging levels */
      ap->msg_enable = 0x00FF;
#elif defined(ATA_DEBUG)
      ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR;
#else
      ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR | ATA_MSG_WARN;
#endif

      INIT_DELAYED_WORK(&ap->port_task, NULL);
      INIT_DELAYED_WORK(&ap->hotplug_task, ata_scsi_hotplug);
      INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan);
      INIT_LIST_HEAD(&ap->eh_done_q);
      init_waitqueue_head(&ap->eh_wait_q);
      init_timer_deferrable(&ap->fastdrain_timer);
      ap->fastdrain_timer.function = ata_eh_fastdrain_timerfn;
      ap->fastdrain_timer.data = (unsigned long)ap;

      ap->cbl = ATA_CBL_NONE;

      ata_link_init(ap, &ap->link, 0);

#ifdef ATA_IRQ_TRAP
      ap->stats.unhandled_irq = 1;
      ap->stats.idle_irq = 1;
#endif
      return ap;
}

static void ata_host_release(struct device *gendev, void *res)
{
      struct ata_host *host = dev_get_drvdata(gendev);
      int i;

      for (i = 0; i < host->n_ports; i++) {
            struct ata_port *ap = host->ports[i];

            if (!ap)
                  continue;

            if (ap->scsi_host)
                  scsi_host_put(ap->scsi_host);

            kfree(ap->pmp_link);
            kfree(ap);
            host->ports[i] = NULL;
      }

      dev_set_drvdata(gendev, NULL);
}

/**
 *    ata_host_alloc - allocate and init basic ATA host resources
 *    @dev: generic device this host is associated with
 *    @max_ports: maximum number of ATA ports associated with this host
 *
 *    Allocate and initialize basic ATA host resources.  LLD calls
 *    this function to allocate a host, initializes it fully and
 *    attaches it using ata_host_register().
 *
 *    @max_ports ports are allocated and host->n_ports is
 *    initialized to @max_ports.  The caller is allowed to decrease
 *    host->n_ports before calling ata_host_register().  The unused
 *    ports will be automatically freed on registration.
 *
 *    RETURNS:
 *    Allocate ATA host on success, NULL on failure.
 *
 *    LOCKING:
 *    Inherited from calling layer (may sleep).
 */
struct ata_host *ata_host_alloc(struct device *dev, int max_ports)
{
      struct ata_host *host;
      size_t sz;
      int i;

      DPRINTK("ENTER\n");

      if (!devres_open_group(dev, NULL, GFP_KERNEL))
            return NULL;

      /* alloc a container for our list of ATA ports (buses) */
      sz = sizeof(struct ata_host) + (max_ports + 1) * sizeof(void *);
      /* alloc a container for our list of ATA ports (buses) */
      host = devres_alloc(ata_host_release, sz, GFP_KERNEL);
      if (!host)
            goto err_out;

      devres_add(dev, host);
      dev_set_drvdata(dev, host);

      spin_lock_init(&host->lock);
      host->dev = dev;
      host->n_ports = max_ports;

      /* allocate ports bound to this host */
      for (i = 0; i < max_ports; i++) {
            struct ata_port *ap;

            ap = ata_port_alloc(host);
            if (!ap)
                  goto err_out;

            ap->port_no = i;
            host->ports[i] = ap;
      }

      devres_remove_group(dev, NULL);
      return host;

 err_out:
      devres_release_group(dev, NULL);
      return NULL;
}

/**
 *    ata_host_alloc_pinfo - alloc host and init with port_info array
 *    @dev: generic device this host is associated with
 *    @ppi: array of ATA port_info to initialize host with
 *    @n_ports: number of ATA ports attached to this host
 *
 *    Allocate ATA host and initialize with info from @ppi.  If NULL
 *    terminated, @ppi may contain fewer entries than @n_ports.  The
 *    last entry will be used for the remaining ports.
 *
 *    RETURNS:
 *    Allocate ATA host on success, NULL on failure.
 *
 *    LOCKING:
 *    Inherited from calling layer (may sleep).
 */
struct ata_host *ata_host_alloc_pinfo(struct device *dev,
                              const struct ata_port_info * const * ppi,
                              int n_ports)
{
      const struct ata_port_info *pi;
      struct ata_host *host;
      int i, j;

      host = ata_host_alloc(dev, n_ports);
      if (!host)
            return NULL;

      for (i = 0, j = 0, pi = NULL; i < host->n_ports; i++) {
            struct ata_port *ap = host->ports[i];

            if (ppi[j])
                  pi = ppi[j++];

            ap->pio_mask = pi->pio_mask;
            ap->mwdma_mask = pi->mwdma_mask;
            ap->udma_mask = pi->udma_mask;
            ap->flags |= pi->flags;
            ap->link.flags |= pi->link_flags;
            ap->ops = pi->port_ops;

            if (!host->ops && (pi->port_ops != &ata_dummy_port_ops))
                  host->ops = pi->port_ops;
            if (!host->private_data && pi->private_data)
                  host->private_data = pi->private_data;
      }

      return host;
}

static void ata_host_stop(struct device *gendev, void *res)
{
      struct ata_host *host = dev_get_drvdata(gendev);
      int i;

      WARN_ON(!(host->flags & ATA_HOST_STARTED));

      for (i = 0; i < host->n_ports; i++) {
            struct ata_port *ap = host->ports[i];

            if (ap->ops->port_stop)
                  ap->ops->port_stop(ap);
      }

      if (host->ops->host_stop)
            host->ops->host_stop(host);
}

/**
 *    ata_host_start - start and freeze ports of an ATA host
 *    @host: ATA host to start ports for
 *
 *    Start and then freeze ports of @host.  Started status is
 *    recorded in host->flags, so this function can be called
 *    multiple times.  Ports are guaranteed to get started only
 *    once.  If host->ops isn't initialized yet, its set to the
 *    first non-dummy port ops.
 *
 *    LOCKING:
 *    Inherited from calling layer (may sleep).
 *
 *    RETURNS:
 *    0 if all ports are started successfully, -errno otherwise.
 */
int ata_host_start(struct ata_host *host)
{
      int have_stop = 0;
      void *start_dr = NULL;
      int i, rc;

      if (host->flags & ATA_HOST_STARTED)
            return 0;

      for (i = 0; i < host->n_ports; i++) {
            struct ata_port *ap = host->ports[i];

            if (!host->ops && !ata_port_is_dummy(ap))
                  host->ops = ap->ops;

            if (ap->ops->port_stop)
                  have_stop = 1;
      }

      if (host->ops->host_stop)
            have_stop = 1;

      if (have_stop) {
            start_dr = devres_alloc(ata_host_stop, 0, GFP_KERNEL);
            if (!start_dr)
                  return -ENOMEM;
      }

      for (i = 0; i < host->n_ports; i++) {
            struct ata_port *ap = host->ports[i];

            if (ap->ops->port_start) {
                  rc = ap->ops->port_start(ap);
                  if (rc) {
                        if (rc != -ENODEV)
                              dev_printk(KERN_ERR, host->dev,
                                    "failed to start port %d "
                                    "(errno=%d)\n", i, rc);
                        goto err_out;
                  }
            }
            ata_eh_freeze_port(ap);
      }

      if (start_dr)
            devres_add(host->dev, start_dr);
      host->flags |= ATA_HOST_STARTED;
      return 0;

 err_out:
      while (--i >= 0) {
            struct ata_port *ap = host->ports[i];

            if (ap->ops->port_stop)
                  ap->ops->port_stop(ap);
      }
      devres_free(start_dr);
      return rc;
}

/**
 *    ata_sas_host_init - Initialize a host struct
 *    @host:      host to initialize
 *    @dev: device host is attached to
 *    @flags:     host flags
 *    @ops: port_ops
 *
 *    LOCKING:
 *    PCI/etc. bus probe sem.
 *
 */
/* KILLME - the only user left is ipr */
void ata_host_init(struct ata_host *host, struct device *dev,
               unsigned long flags, const struct ata_port_operations *ops)
{
      spin_lock_init(&host->lock);
      host->dev = dev;
      host->flags = flags;
      host->ops = ops;
}

/**
 *    ata_host_register - register initialized ATA host
 *    @host: ATA host to register
 *    @sht: template for SCSI host
 *
 *    Register initialized ATA host.  @host is allocated using
 *    ata_host_alloc() and fully initialized by LLD.  This function
 *    starts ports, registers @host with ATA and SCSI layers and
 *    probe registered devices.
 *
 *    LOCKING:
 *    Inherited from calling layer (may sleep).
 *
 *    RETURNS:
 *    0 on success, -errno otherwise.
 */
int ata_host_register(struct ata_host *host, struct scsi_host_template *sht)
{
      int i, rc;

      /* host must have been started */
      if (!(host->flags & ATA_HOST_STARTED)) {
            dev_printk(KERN_ERR, host->dev,
                     "BUG: trying to register unstarted host\n");
            WARN_ON(1);
            return -EINVAL;
      }

      /* Blow away unused ports.  This happens when LLD can't
       * determine the exact number of ports to allocate at
       * allocation time.
       */
      for (i = host->n_ports; host->ports[i]; i++)
            kfree(host->ports[i]);

      /* give ports names and add SCSI hosts */
      for (i = 0; i < host->n_ports; i++)
            host->ports[i]->print_id = ata_print_id++;

      rc = ata_scsi_add_hosts(host, sht);
      if (rc)
            return rc;

      /* associate with ACPI nodes */
      ata_acpi_associate(host);

      /* set cable, sata_spd_limit and report */
      for (i = 0; i < host->n_ports; i++) {
            struct ata_port *ap = host->ports[i];
            unsigned long xfer_mask;

            /* set SATA cable type if still unset */
            if (ap->cbl == ATA_CBL_NONE && (ap->flags & ATA_FLAG_SATA))
                  ap->cbl = ATA_CBL_SATA;

            /* init sata_spd_limit to the current value */
            sata_link_init_spd(&ap->link);

            /* print per-port info to dmesg */
            xfer_mask = ata_pack_xfermask(ap->pio_mask, ap->mwdma_mask,
                                    ap->udma_mask);

            if (!ata_port_is_dummy(ap)) {
                  ata_port_printk(ap, KERN_INFO,
                              "%cATA max %s %s\n",
                              (ap->flags & ATA_FLAG_SATA) ? 'S' : 'P',
                              ata_mode_string(xfer_mask),
                              ap->link.eh_info.desc);
                  ata_ehi_clear_desc(&ap->link.eh_info);
            } else
                  ata_port_printk(ap, KERN_INFO, "DUMMY\n");
      }

      /* perform each probe synchronously */
      DPRINTK("probe begin\n");
      for (i = 0; i < host->n_ports; i++) {
            struct ata_port *ap = host->ports[i];
            int rc;

            /* probe */
            if (ap->ops->error_handler) {
                  struct ata_eh_info *ehi = &ap->link.eh_info;
                  unsigned long flags;

                  ata_port_probe(ap);

                  /* kick EH for boot probing */
                  spin_lock_irqsave(ap->lock, flags);

                  ehi->probe_mask =
                        (1 << ata_link_max_devices(&ap->link)) - 1;
                  ehi->action |= ATA_EH_SOFTRESET;
                  ehi->flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET;

                  ap->pflags &= ~ATA_PFLAG_INITIALIZING;
                  ap->pflags |= ATA_PFLAG_LOADING;
                  ata_port_schedule_eh(ap);

                  spin_unlock_irqrestore(ap->lock, flags);

                  /* wait for EH to finish */
                  ata_port_wait_eh(ap);
            } else {
                  DPRINTK("ata%u: bus probe begin\n", ap->print_id);
                  rc = ata_bus_probe(ap);
                  DPRINTK("ata%u: bus probe end\n", ap->print_id);

                  if (rc) {
                        /* FIXME: do something useful here?
                         * Current libata behavior will
                         * tear down everything when
                         * the module is removed
                         * or the h/w is unplugged.
                         */
                  }
            }
      }

      /* probes are done, now scan each port's disk(s) */
      DPRINTK("host probe begin\n");
      for (i = 0; i < host->n_ports; i++) {
            struct ata_port *ap = host->ports[i];

            ata_scsi_scan_host(ap, 1);
            ata_lpm_schedule(ap, ap->pm_policy);
      }

      return 0;
}

/**
 *    ata_host_activate - start host, request IRQ and register it
 *    @host: target ATA host
 *    @irq: IRQ to request
 *    @irq_handler: irq_handler used when requesting IRQ
 *    @irq_flags: irq_flags used when requesting IRQ
 *    @sht: scsi_host_template to use when registering the host
 *
 *    After allocating an ATA host and initializing it, most libata
 *    LLDs perform three steps to activate the host - start host,
 *    request IRQ and register it.  This helper takes necessasry
 *    arguments and performs the three steps in one go.
 *
 *    An invalid IRQ skips the IRQ registration and expects the host to
 *    have set polling mode on the port. In this case, @irq_handler
 *    should be NULL.
 *
 *    LOCKING:
 *    Inherited from calling layer (may sleep).
 *
 *    RETURNS:
 *    0 on success, -errno otherwise.
 */
int ata_host_activate(struct ata_host *host, int irq,
                  irq_handler_t irq_handler, unsigned long irq_flags,
                  struct scsi_host_template *sht)
{
      int i, rc;

      rc = ata_host_start(host);
      if (rc)
            return rc;

      /* Special case for polling mode */
      if (!irq) {
            WARN_ON(irq_handler);
            return ata_host_register(host, sht);
      }

      rc = devm_request_irq(host->dev, irq, irq_handler, irq_flags,
                        dev_driver_string(host->dev), host);
      if (rc)
            return rc;

      for (i = 0; i < host->n_ports; i++)
            ata_port_desc(host->ports[i], "irq %d", irq);

      rc = ata_host_register(host, sht);
      /* if failed, just free the IRQ and leave ports alone */
      if (rc)
            devm_free_irq(host->dev, irq, host);

      return rc;
}

/**
 *    ata_port_detach - Detach ATA port in prepration of device removal
 *    @ap: ATA port to be detached
 *
 *    Detach all ATA devices and the associated SCSI devices of @ap;
 *    then, remove the associated SCSI host.  @ap is guaranteed to
 *    be quiescent on return from this function.
 *
 *    LOCKING:
 *    Kernel thread context (may sleep).
 */
static void ata_port_detach(struct ata_port *ap)
{
      unsigned long flags;
      struct ata_link *link;
      struct ata_device *dev;

      if (!ap->ops->error_handler)
            goto skip_eh;

      /* tell EH we're leaving & flush EH */
      spin_lock_irqsave(ap->lock, flags);
      ap->pflags |= ATA_PFLAG_UNLOADING;
      spin_unlock_irqrestore(ap->lock, flags);

      ata_port_wait_eh(ap);

      /* EH is now guaranteed to see UNLOADING - EH context belongs
       * to us.  Disable all existing devices.
       */
      ata_port_for_each_link(link, ap) {
            ata_link_for_each_dev(dev, link)
                  ata_dev_disable(dev);
      }

      /* Final freeze & EH.  All in-flight commands are aborted.  EH
       * will be skipped and retrials will be terminated with bad
       * target.
       */
      spin_lock_irqsave(ap->lock, flags);
      ata_port_freeze(ap);    /* won't be thawed */
      spin_unlock_irqrestore(ap->lock, flags);

      ata_port_wait_eh(ap);
      cancel_rearming_delayed_work(&ap->hotplug_task);

 skip_eh:
      /* remove the associated SCSI host */
      scsi_remove_host(ap->scsi_host);
}

/**
 *    ata_host_detach - Detach all ports of an ATA host
 *    @host: Host to detach
 *
 *    Detach all ports of @host.
 *
 *    LOCKING:
 *    Kernel thread context (may sleep).
 */
void ata_host_detach(struct ata_host *host)
{
      int i;

      for (i = 0; i < host->n_ports; i++)
            ata_port_detach(host->ports[i]);

      /* the host is dead now, dissociate ACPI */
      ata_acpi_dissociate(host);
}

/**
 *    ata_std_ports - initialize ioaddr with standard port offsets.
 *    @ioaddr: IO address structure to be initialized
 *
 *    Utility function which initializes data_addr, error_addr,
 *    feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
 *    device_addr, status_addr, and command_addr to standard offsets
 *    relative to cmd_addr.
 *
 *    Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
 */

void ata_std_ports(struct ata_ioports *ioaddr)
{
      ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
      ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
      ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
      ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
      ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
      ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
      ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
      ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
      ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
      ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
}


#ifdef CONFIG_PCI

/**
 *    ata_pci_remove_one - PCI layer callback for device removal
 *    @pdev: PCI device that was removed
 *
 *    PCI layer indicates to libata via this hook that hot-unplug or
 *    module unload event has occurred.  Detach all ports.  Resource
 *    release is handled via devres.
 *
 *    LOCKING:
 *    Inherited from PCI layer (may sleep).
 */
void ata_pci_remove_one(struct pci_dev *pdev)
{
      struct device *dev = &pdev->dev;
      struct ata_host *host = dev_get_drvdata(dev);

      ata_host_detach(host);
}

/* move to PCI subsystem */
int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
{
      unsigned long tmp = 0;

      switch (bits->width) {
      case 1: {
            u8 tmp8 = 0;
            pci_read_config_byte(pdev, bits->reg, &tmp8);
            tmp = tmp8;
            break;
      }
      case 2: {
            u16 tmp16 = 0;
            pci_read_config_word(pdev, bits->reg, &tmp16);
            tmp = tmp16;
            break;
      }
      case 4: {
            u32 tmp32 = 0;
            pci_read_config_dword(pdev, bits->reg, &tmp32);
            tmp = tmp32;
            break;
      }

      default:
            return -EINVAL;
      }

      tmp &= bits->mask;

      return (tmp == bits->val) ? 1 : 0;
}

#ifdef CONFIG_PM
void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg)
{
      pci_save_state(pdev);
      pci_disable_device(pdev);

      if (mesg.event == PM_EVENT_SUSPEND)
            pci_set_power_state(pdev, PCI_D3hot);
}

int ata_pci_device_do_resume(struct pci_dev *pdev)
{
      int rc;

      pci_set_power_state(pdev, PCI_D0);
      pci_restore_state(pdev);

      rc = pcim_enable_device(pdev);
      if (rc) {
            dev_printk(KERN_ERR, &pdev->dev,
                     "failed to enable device after resume (%d)\n", rc);
            return rc;
      }

      pci_set_master(pdev);
      return 0;
}

int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
{
      struct ata_host *host = dev_get_drvdata(&pdev->dev);
      int rc = 0;

      rc = ata_host_suspend(host, mesg);
      if (rc)
            return rc;

      ata_pci_device_do_suspend(pdev, mesg);

      return 0;
}

int ata_pci_device_resume(struct pci_dev *pdev)
{
      struct ata_host *host = dev_get_drvdata(&pdev->dev);
      int rc;

      rc = ata_pci_device_do_resume(pdev);
      if (rc == 0)
            ata_host_resume(host);
      return rc;
}
#endif /* CONFIG_PM */

#endif /* CONFIG_PCI */


static int __init ata_init(void)
{
      ata_probe_timeout *= HZ;
      ata_wq = create_workqueue("ata");
      if (!ata_wq)
            return -ENOMEM;

      ata_aux_wq = create_singlethread_workqueue("ata_aux");
      if (!ata_aux_wq) {
            destroy_workqueue(ata_wq);
            return -ENOMEM;
      }

      printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
      return 0;
}

static void __exit ata_exit(void)
{
      destroy_workqueue(ata_wq);
      destroy_workqueue(ata_aux_wq);
}

subsys_initcall(ata_init);
module_exit(ata_exit);

static unsigned long ratelimit_time;
static DEFINE_SPINLOCK(ata_ratelimit_lock);

int ata_ratelimit(void)
{
      int rc;
      unsigned long flags;

      spin_lock_irqsave(&ata_ratelimit_lock, flags);

      if (time_after(jiffies, ratelimit_time)) {
            rc = 1;
            ratelimit_time = jiffies + (HZ/5);
      } else
            rc = 0;

      spin_unlock_irqrestore(&ata_ratelimit_lock, flags);

      return rc;
}

/**
 *    ata_wait_register - wait until register value changes
 *    @reg: IO-mapped register
 *    @mask: Mask to apply to read register value
 *    @val: Wait condition
 *    @interval_msec: polling interval in milliseconds
 *    @timeout_msec: timeout in milliseconds
 *
 *    Waiting for some bits of register to change is a common
 *    operation for ATA controllers.  This function reads 32bit LE
 *    IO-mapped register @reg and tests for the following condition.
 *
 *    (*@reg & mask) != val
 *
 *    If the condition is met, it returns; otherwise, the process is
 *    repeated after @interval_msec until timeout.
 *
 *    LOCKING:
 *    Kernel thread context (may sleep)
 *
 *    RETURNS:
 *    The final register value.
 */
u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
                  unsigned long interval_msec,
                  unsigned long timeout_msec)
{
      unsigned long timeout;
      u32 tmp;

      tmp = ioread32(reg);

      /* Calculate timeout _after_ the first read to make sure
       * preceding writes reach the controller before starting to
       * eat away the timeout.
       */
      timeout = jiffies + (timeout_msec * HZ) / 1000;

      while ((tmp & mask) == val && time_before(jiffies, timeout)) {
            msleep(interval_msec);
            tmp = ioread32(reg);
      }

      return tmp;
}

/*
 * Dummy port_ops
 */
static void ata_dummy_noret(struct ata_port *ap)      { }
static int ata_dummy_ret0(struct ata_port *ap)        { return 0; }
static void ata_dummy_qc_noret(struct ata_queued_cmd *qc) { }

static u8 ata_dummy_check_status(struct ata_port *ap)
{
      return ATA_DRDY;
}

static unsigned int ata_dummy_qc_issue(struct ata_queued_cmd *qc)
{
      return AC_ERR_SYSTEM;
}

const struct ata_port_operations ata_dummy_port_ops = {
      .check_status           = ata_dummy_check_status,
      .check_altstatus  = ata_dummy_check_status,
      .dev_select       = ata_noop_dev_select,
      .qc_prep          = ata_noop_qc_prep,
      .qc_issue         = ata_dummy_qc_issue,
      .freeze                 = ata_dummy_noret,
      .thaw             = ata_dummy_noret,
      .error_handler          = ata_dummy_noret,
      .post_internal_cmd      = ata_dummy_qc_noret,
      .irq_clear        = ata_dummy_noret,
      .port_start       = ata_dummy_ret0,
      .port_stop        = ata_dummy_noret,
};

const struct ata_port_info ata_dummy_port_info = {
      .port_ops         = &ata_dummy_port_ops,
};

/*
 * libata is essentially a library of internal helper functions for
 * low-level ATA host controller drivers.  As such, the API/ABI is
 * likely to change as new drivers are added and updated.
 * Do not depend on ABI/API stability.
 */
EXPORT_SYMBOL_GPL(sata_deb_timing_normal);
EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug);
EXPORT_SYMBOL_GPL(sata_deb_timing_long);
EXPORT_SYMBOL_GPL(ata_dummy_port_ops);
EXPORT_SYMBOL_GPL(ata_dummy_port_info);
EXPORT_SYMBOL_GPL(ata_std_bios_param);
EXPORT_SYMBOL_GPL(ata_std_ports);
EXPORT_SYMBOL_GPL(ata_host_init);
EXPORT_SYMBOL_GPL(ata_host_alloc);
EXPORT_SYMBOL_GPL(ata_host_alloc_pinfo);
EXPORT_SYMBOL_GPL(ata_host_start);
EXPORT_SYMBOL_GPL(ata_host_register);
EXPORT_SYMBOL_GPL(ata_host_activate);
EXPORT_SYMBOL_GPL(ata_host_detach);
EXPORT_SYMBOL_GPL(ata_sg_init);
EXPORT_SYMBOL_GPL(ata_sg_init_one);
EXPORT_SYMBOL_GPL(ata_hsm_move);
EXPORT_SYMBOL_GPL(ata_qc_complete);
EXPORT_SYMBOL_GPL(ata_qc_complete_multiple);
EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
EXPORT_SYMBOL_GPL(ata_tf_load);
EXPORT_SYMBOL_GPL(ata_tf_read);
EXPORT_SYMBOL_GPL(ata_noop_dev_select);
EXPORT_SYMBOL_GPL(ata_std_dev_select);
EXPORT_SYMBOL_GPL(sata_print_link_status);
EXPORT_SYMBOL_GPL(ata_tf_to_fis);
EXPORT_SYMBOL_GPL(ata_tf_from_fis);
EXPORT_SYMBOL_GPL(ata_check_status);
EXPORT_SYMBOL_GPL(ata_altstatus);
EXPORT_SYMBOL_GPL(ata_exec_command);
EXPORT_SYMBOL_GPL(ata_port_start);
EXPORT_SYMBOL_GPL(ata_sff_port_start);
EXPORT_SYMBOL_GPL(ata_interrupt);
EXPORT_SYMBOL_GPL(ata_do_set_mode);
EXPORT_SYMBOL_GPL(ata_data_xfer);
EXPORT_SYMBOL_GPL(ata_data_xfer_noirq);
EXPORT_SYMBOL_GPL(ata_std_qc_defer);
EXPORT_SYMBOL_GPL(ata_qc_prep);
EXPORT_SYMBOL_GPL(ata_dumb_qc_prep);
EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
EXPORT_SYMBOL_GPL(ata_bmdma_setup);
EXPORT_SYMBOL_GPL(ata_bmdma_start);
EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
EXPORT_SYMBOL_GPL(ata_bmdma_status);
EXPORT_SYMBOL_GPL(ata_bmdma_stop);
EXPORT_SYMBOL_GPL(ata_bmdma_freeze);
EXPORT_SYMBOL_GPL(ata_bmdma_thaw);
EXPORT_SYMBOL_GPL(ata_bmdma_drive_eh);
EXPORT_SYMBOL_GPL(ata_bmdma_error_handler);
EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd);
EXPORT_SYMBOL_GPL(ata_port_probe);
EXPORT_SYMBOL_GPL(ata_dev_disable);
EXPORT_SYMBOL_GPL(sata_set_spd);
EXPORT_SYMBOL_GPL(sata_link_debounce);
EXPORT_SYMBOL_GPL(sata_link_resume);
EXPORT_SYMBOL_GPL(ata_bus_reset);
EXPORT_SYMBOL_GPL(ata_std_prereset);
EXPORT_SYMBOL_GPL(ata_std_softreset);
EXPORT_SYMBOL_GPL(sata_link_hardreset);
EXPORT_SYMBOL_GPL(sata_std_hardreset);
EXPORT_SYMBOL_GPL(ata_std_postreset);
EXPORT_SYMBOL_GPL(ata_dev_classify);
EXPORT_SYMBOL_GPL(ata_dev_pair);
EXPORT_SYMBOL_GPL(ata_port_disable);
EXPORT_SYMBOL_GPL(ata_ratelimit);
EXPORT_SYMBOL_GPL(ata_wait_register);
EXPORT_SYMBOL_GPL(ata_busy_sleep);
EXPORT_SYMBOL_GPL(ata_wait_after_reset);
EXPORT_SYMBOL_GPL(ata_wait_ready);
EXPORT_SYMBOL_GPL(ata_port_queue_task);
EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy);
EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth);
EXPORT_SYMBOL_GPL(ata_host_intr);
EXPORT_SYMBOL_GPL(sata_scr_valid);
EXPORT_SYMBOL_GPL(sata_scr_read);
EXPORT_SYMBOL_GPL(sata_scr_write);
EXPORT_SYMBOL_GPL(sata_scr_write_flush);
EXPORT_SYMBOL_GPL(ata_link_online);
EXPORT_SYMBOL_GPL(ata_link_offline);
#ifdef CONFIG_PM
EXPORT_SYMBOL_GPL(ata_host_suspend);
EXPORT_SYMBOL_GPL(ata_host_resume);
#endif /* CONFIG_PM */
EXPORT_SYMBOL_GPL(ata_id_string);
EXPORT_SYMBOL_GPL(ata_id_c_string);
EXPORT_SYMBOL_GPL(ata_id_to_dma_mode);
EXPORT_SYMBOL_GPL(ata_scsi_simulate);

EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
EXPORT_SYMBOL_GPL(ata_timing_compute);
EXPORT_SYMBOL_GPL(ata_timing_merge);

#ifdef CONFIG_PCI
EXPORT_SYMBOL_GPL(pci_test_config_bits);
EXPORT_SYMBOL_GPL(ata_pci_init_sff_host);
EXPORT_SYMBOL_GPL(ata_pci_init_bmdma);
EXPORT_SYMBOL_GPL(ata_pci_prepare_sff_host);
EXPORT_SYMBOL_GPL(ata_pci_init_one);
EXPORT_SYMBOL_GPL(ata_pci_remove_one);
#ifdef CONFIG_PM
EXPORT_SYMBOL_GPL(ata_pci_device_do_suspend);
EXPORT_SYMBOL_GPL(ata_pci_device_do_resume);
EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
EXPORT_SYMBOL_GPL(ata_pci_device_resume);
#endif /* CONFIG_PM */
EXPORT_SYMBOL_GPL(ata_pci_default_filter);
EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
#endif /* CONFIG_PCI */

EXPORT_SYMBOL_GPL(sata_pmp_qc_defer_cmd_switch);
EXPORT_SYMBOL_GPL(sata_pmp_std_prereset);
EXPORT_SYMBOL_GPL(sata_pmp_std_hardreset);
EXPORT_SYMBOL_GPL(sata_pmp_std_postreset);
EXPORT_SYMBOL_GPL(sata_pmp_do_eh);

EXPORT_SYMBOL_GPL(__ata_ehi_push_desc);
EXPORT_SYMBOL_GPL(ata_ehi_push_desc);
EXPORT_SYMBOL_GPL(ata_ehi_clear_desc);
EXPORT_SYMBOL_GPL(ata_port_desc);
#ifdef CONFIG_PCI
EXPORT_SYMBOL_GPL(ata_port_pbar_desc);
#endif /* CONFIG_PCI */
EXPORT_SYMBOL_GPL(ata_port_schedule_eh);
EXPORT_SYMBOL_GPL(ata_link_abort);
EXPORT_SYMBOL_GPL(ata_port_abort);
EXPORT_SYMBOL_GPL(ata_port_freeze);
EXPORT_SYMBOL_GPL(sata_async_notification);
EXPORT_SYMBOL_GPL(ata_eh_freeze_port);
EXPORT_SYMBOL_GPL(ata_eh_thaw_port);
EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
EXPORT_SYMBOL_GPL(ata_do_eh);
EXPORT_SYMBOL_GPL(ata_irq_on);
EXPORT_SYMBOL_GPL(ata_dev_try_classify);

EXPORT_SYMBOL_GPL(ata_cable_40wire);
EXPORT_SYMBOL_GPL(ata_cable_80wire);
EXPORT_SYMBOL_GPL(ata_cable_unknown);
EXPORT_SYMBOL_GPL(ata_cable_sata);

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