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clock.h

#ifndef __ASM_SH_CLOCK_H
#define __ASM_SH_CLOCK_H

#include <linux/kref.h>
#include <linux/list.h>
#include <linux/seq_file.h>
#include <linux/clk.h>
#include <linux/err.h>

struct clk;

struct clk_ops {
      void (*init)(struct clk *clk);
      void (*enable)(struct clk *clk);
      void (*disable)(struct clk *clk);
      void (*recalc)(struct clk *clk);
      int (*set_rate)(struct clk *clk, unsigned long rate, int algo_id);
      long (*round_rate)(struct clk *clk, unsigned long rate);
};

struct clk {
      struct list_head  node;
      const char        *name;
      int               id;
      struct module           *owner;

      struct clk        *parent;
      struct clk_ops          *ops;

      struct kref       kref;

      unsigned long           rate;
      unsigned long           flags;
      unsigned long           arch_flags;
};

#define CLK_ALWAYS_ENABLED    (1 << 0)
#define CLK_RATE_PROPAGATES   (1 << 1)

/* Should be defined by processor-specific code */
void arch_init_clk_ops(struct clk_ops **, int type);

/* arch/sh/kernel/cpu/clock.c */
int clk_init(void);

void clk_recalc_rate(struct clk *);

int clk_register(struct clk *);
void clk_unregister(struct clk *);

static inline int clk_always_enable(const char *id)
{
      struct clk *clk;
      int ret;

      clk = clk_get(NULL, id);
      if (IS_ERR(clk))
            return PTR_ERR(clk);

      ret = clk_enable(clk);
      if (ret)
            clk_put(clk);

      return ret;
}

/* the exported API, in addition to clk_set_rate */
/**
 * clk_set_rate_ex - set the clock rate for a clock source, with additional parameter
 * @clk: clock source
 * @rate: desired clock rate in Hz
 * @algo_id: algorithm id to be passed down to ops->set_rate
 *
 * Returns success (0) or negative errno.
 */
int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id);

enum clk_sh_algo_id {
      NO_CHANGE = 0,

      IUS_N1_N1,
      IUS_322,
      IUS_522,
      IUS_N11,

      SB_N1,

      SB3_N1,
      SB3_32,
      SB3_43,
      SB3_54,

      BP_N1,

      IP_N1,
};
#endif /* __ASM_SH_CLOCK_H */

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