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/* arch/arm/plat-s3c/include/plat/dma.h
 * Copyright (C) 2003,2004,2006 Simtec Electronics
 *    Ben Dooks <ben@simtec.co.uk>
 * Samsung S3C DMA support
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.

enum s3c2410_dma_buffresult {

enum s3c2410_dmasrc {
      S3C2410_DMASRC_HW,            /* source is memory */
      S3C2410_DMASRC_MEM            /* source is hardware */

/* enum s3c2410_chan_op
 * operation codes passed to the DMA code by the user, and also used
 * to inform the current channel owner of any changes to the system state

enum s3c2410_chan_op {
      S3C2410_DMAOP_TIMEOUT,        /* internal signal to handler */
      S3C2410_DMAOP_STARTED,        /* indicate channel started */

00040 struct s3c2410_dma_client {
      char                *name;

struct s3c2410_dma_chan;

/* s3c2410_dma_cbfn_t
 * buffer callback routine type

typedef void (*s3c2410_dma_cbfn_t)(struct s3c2410_dma_chan *,
                           void *buf, int size,
                           enum s3c2410_dma_buffresult result);

typedef int  (*s3c2410_dma_opfn_t)(struct s3c2410_dma_chan *,
                           enum s3c2410_chan_op );

/* s3c2410_dma_request
 * request a dma channel exclusivley

extern int s3c2410_dma_request(unsigned int channel,
                         struct s3c2410_dma_client *, void *dev);

/* s3c2410_dma_ctrl
 * change the state of the dma channel

extern int s3c2410_dma_ctrl(unsigned int channel, enum s3c2410_chan_op op);

/* s3c2410_dma_setflags
 * set the channel's flags to a given state

extern int s3c2410_dma_setflags(unsigned int channel,
                        unsigned int flags);

/* s3c2410_dma_free
 * free the dma channel (will also abort any outstanding operations)

extern int s3c2410_dma_free(unsigned int channel, struct s3c2410_dma_client *);

/* s3c2410_dma_enqueue
 * place the given buffer onto the queue of operations for the channel.
 * The buffer must be allocated from dma coherent memory, or the Dcache/WB
 * drained before the buffer is given to the DMA system.

extern int s3c2410_dma_enqueue(unsigned int channel, void *id,
                         dma_addr_t data, int size);

/* s3c2410_dma_config
 * configure the dma channel

extern int s3c2410_dma_config(unsigned int channel, int xferunit);

/* s3c2410_dma_devconfig
 * configure the device we're talking to

extern int s3c2410_dma_devconfig(int channel, enum s3c2410_dmasrc source,
                         unsigned long devaddr);

/* s3c2410_dma_getposition
 * get the position that the dma transfer is currently at

extern int s3c2410_dma_getposition(unsigned int channel,
                           dma_addr_t *src, dma_addr_t *dest);

extern int s3c2410_dma_set_opfn(unsigned int, s3c2410_dma_opfn_t rtn);
extern int s3c2410_dma_set_buffdone_fn(unsigned int, s3c2410_dma_cbfn_t rtn);

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